Pure nickel lidded TO style packages are a common packaging type for active microelectronics with application in various fields including commercial, aerospace and defense. This paper will focus on the history of nickel flakes in the industry, current trends and failure analysis findings, and future considerations for this potential failure mechanism. In 2004 Hi-Rel Laboratories became involved in an important nickel flake study which led to further inspections to document and evaluate nickel flakes in TO style lids from various customers and manufacturers. Through 2015 these inspections also assisted manufacturers to evaluate the effectiveness of their lid preparation and various cleaning methods for this package style, resulting in a substantial reduction in total number of nickel flakes greater than the specified critical dimension. In 2019 investigations were rekindled after the discovery of a suspected nickel flake-induced failure in transistors from a manufacturer not involved in prior analyses. As part of the investigation, which included nickel flake inspection of 38 total transistors from 1992, 2010, 2011 and 2017 lot date codes, the components were subjected to various environmental conditions including vibration, mechanical shock, mild thermal cycling, ionized airflow and degaussing. It was discovered that degaussing alone greatly affected the adhesion of the nickel flakes to the internal surfaces, causing the majority of the flakes to break free. The methodology, findings and implications of this analysis will be discussed.

A novel method of fabrication of all-metal probes for scanning probe microscopy was developed. The motivation for this work was to develop probes and a method of fabricating them, which can be applied to measure friction of pairs of many different materials at the nanoscale. The main process of the presented manufacturing technique is nickel electrodeposition. The other steps are similarly simple and cheap. Moreover, the technique can be easily modified to manufacture probes of different materials and with different tip shapes.

In this work, energy-filtered TEM nano-beam diffraction (NBD) technique was used to evaluate channel strain profile in pMOS transistors suffering low Idsat issue. TEM and EDX analysis showed nickel deep diffusion into embedded SiGe source/drain. Such defect not only led to leakage current from S/D to substrate but might also reduce compressive strain induced to channel by eSiGe. Comparison of channel-direction strain between bad and good samples using NBD confirmed strain relaxation in bad sample which explained low Idsat as a result of reduced holes mobility.

The effect of interfacial reaction of Ti/Ni(V)/Au under-bump metallisation (UBM) systems in Pb free solder had been investigated. The objective was to examine the microstructure change and intermetallic formation of Ni-based UBM during isothermal annealing in lead free solder as well as to understand its impact on the UBM failure mechanism. Studies revealed that after IR reflow, spalling of Ni-Sn compound from the UBM took place. A layer of Ni-Sn-V was found to have form in the UBM. The formation of Ni-Sn-V layer was believed to have an impact on the failure mechanism of the Pb free solder. Studies also showed that doubling the Ni layer thickness in this UBM system did not have significant improvement to the overall integrity of the solder joint. However, samples with electroless Ni(P)/Au UBM in lead free solder showed relatively good thermal properties. No major change in the intermetallic composition was observed. More details on the microstructure change during thermal aging of the UBM systems were presented in this article.

A common pad finish on area array (BGA or CSP) packages and printed wiring board (PWB) substrates is Ni/Au, using either electrolytic or electroless deposition processes. Although both Ni/Au processes provide flat, solderable surface finishes, there are an increasing number of applications of the electroless nickel/immersion gold (ENi/IAu) surface finish in response to requirements for increased density and electrical performance. This increasing usage continues despite mounting evidence that Ni/Au causes or contributes to catastrophic, brittle, interfacial solder joint fractures. These brittle, interfacial fractures occur early in service or can be generated under a variety of laboratory testing conditions including thermal cycling (premature failures), isothermal aging (high temperature storage), and mechanical testing. There are major initiatives by electronics industry consortia as well as research by individual companies to eliminate these fracture phenomena. Despite these efforts, interfacial fractures associated with Ni/Au surface finishes continue to be reported and specific failure mechanisms and root cause of these failures remains under investigation. Failure analysis techniques and methodologies are crucial to advancing the understanding of these phenomena. In this study, the scope of the fracture problem is illustrated using three failure analysis case studies of brittle interfacial fractures in area array solder interconnects. Two distinct failure modes are associated with Ni/Au surface finishes. In both modes, the fracture surfaces appear to be relatively flat with little evidence of plastic deformation. Detailed metallography, scanning electron microscopy (SEM), energy dispersive x-ray analysis (EDX), and an understanding of the metallurgy of the soldering reaction are required to avoid misinterpreting the failure modes.