In this paper, we describe the technique of on-axis transmission Kikuchi diffraction (TKD) in a scanning electron microscope and demonstrate its use in characterizing nanoscale crystal structures and defects in semiconductor materials and devices. We explain how we modified hardware and software to achieve an effective spatial resolution of 2 nm during orientation mapping without decreasing acquisition speed, indexing quality, and other performance parameters. The paper includes illustrations comparing sample-detector geometries for conventional EBSD, TKD, and on-axis TKD. It also presents examples of the types of images that can be obtained using on-axis TKD, including raw crystal orientation maps, diffraction patterns, pattern quality maps, time-resolved orientation maps showing microstructure evolution, and a sparse sample map showing the distribution of quantum dots on an electron transparent support film.

The results presented here show how high-speed simultaneous EBSD and EDS can be used to characterize the essential microstructural parameters in SnPb solder joints with high resolution and precision. Analyses of both intact and failed solder joints have been carried out. Regions of strain localization that are not apparent from the Sn and Pb phase distribution are identified in the intact bond, providing key insights into the mechanism of potential bond failure. In addition, EBSD provides a wealth of quantitative detail such as the relationship between parent Sn grain orientations and Pb coarsening, the morphology and distribution of IMCs on a sub-micron scale and accurate grain size information for all phases within the joint. Such analyses enable a better understanding of the microstructural developments leading up to failure, opening up the possibility of improved accelerated thermal cycling (ATC) testing and better quality control.

Aluminum-copper alloys are popular for many applications that take advantage of the combination of properties in the alloys. This paper describes the use of multiple advanced failure analysis tools to analyze the physical and chemical properties of Al-Cu alloy thin films.

The continually shrinking dimensions of today’s semiconductor technology occasionally allow for novel approaches in imaging defects. It has become desirable to image subsurface voids prior to cross sectioning and some efforts have been made to address this need including the construction of specialized instrumentation [1]. The thickness of the metallization levels at the 65 nm technology node and smaller now allow for the use of the electron beam in a scanning electron microscope (SEM) as a material sensor. At high accelerating voltages (between 20-30 kV) in backscatter imaging mode the numerical gray level values at each pixel location can correlate to the amount of material directly under the electron beam at that location. This is particularly evident when dealing with defined geometries and material sets offering high contrast changes between materials such as those found in semiconductor technology like copper (Cu) metal and conventional dielectric materials. As a result, subsurface voids can be mapped to a reasonable representation prior to cross sectioning and precise pinpointing of the defect location in test structures can occur. This paper discusses this methodology on 65 nm technology with Cu metal lines in a low-k dielectric material for a two level metal test structure. To some extent this work represents a natural extension of a paper presented previously by the author [2].

Both the increased complexity of integrated circuits, resulting in six or more levels of integration, and the increasing use of flip-chip packaging have driven the development of integrated circuit (IC) failure analysis tools that can be applied to the backside of the chip. Among these new approaches are focused ion beam (FIB) tools and processes for performing chip edits/repairs from the die backside. This paper describes the use of backside FIB for a failure analysis application rather than for chip repair. Specifically, we used FIB technology to prepare an IC for inspection of voided metal interconnects (“lines”) and vias. Conventional FIB milling was combined with a superenhanced gas assisted milling process that uses XeF2 for rapid removal of large volumes of bulk silicon. This combined approach allowed removal of the TiW underlayer from a large number of M1 lines simultaneously, enabling rapid localization and plan view imaging of voids in lines and vias with backscattered electron (BSE) imaging in a scanning electron microscope (SEM). Sequential cross sections of individual voided vias enabled us to develop a 3D reconstruction of these voids. This information clarified how the voids were formed, helping us identify the IC process steps that needed to be changed.

A wealth of literature has arisen in the past couple of decades regarding the phenomenon of electromigration. In addition, stress voiding has received considerable attention from the research community. Some of the work on the structural character of these phenomena has focussed on the roles of crystallographic texture and grain boundary structure. It is an experimental fact that the strength of the (111) fiber texture is an indication of interconnect reliability, the stronger the texture, the more reliable the interconnect. It is also presumed that grain boundary diffusivity is a controlling factor in electromigration behavior of polycrystalline lines. Undesirable grain boundary structure is likely a cause of failure in lines with a bamboo structure as well because they are often sites of stress concentration and local incompatibilities. The present study focuses upon electromigration failures in test structures of Al-Cu lines and stress voiding in Cu lines. Texture and grain boundary structure were measured directly on the specimens using electron back-scatter diffraction and orientation imaging. It is observed that a correlation exists between grain boundary structure and void formation in strongly textured polycrystalline lines. Results indicate that secondary orientation (not just the (111) fiber), and boundary structure may be of primary importance in optimizing interconnect microstructure.