In today’s advanced technology world, electronic devices are playing a key role in modern semiconductor products to improve the energy proficiency. These devices are required to be contamination free especially on the bond pad with good adhesion before wire bonding process at the back end. Contamination on the bond pad leads to reliability issues such as pad corrosion, delamination and failure leading to leakage and open fails of electronic devices. Therefore, detection accuracy and sensibility of contamination is important. Auger analysis is the most suitable technique to check bond pad contamination. Auger electron spectroscopy has the capability of analyzing compositional information with excellent spatial resolution. However, charging, noise or artifact is known to be a major concern to the characterization of insulating materials. This paper outlines the strategy that has been utilized to minimize the artifact, noise or charging impact for Auger investigation on a smaller bond pad surrounded by imide passivation layers. The imide passivation layer normally causes the charging effect during Auger analysis, which makes the Auger analysis difficult to be proceed. In addition to that, the charging effect leads to inaccurate analysis. In this paper, we demonstrate a sample preparation method to minimize the charging and artifact of Auger analysis especially for small bond pads.

Voltage contrast (VC) observation using a scanning electron microscope (SEM) or a focused ion beam (FIB) is a common failure analysis technique for semiconductor devices.[1] The VC information allows understanding of failure localization issues. In general, VC images are acquired using secondary electrons (SEs) from a sample surface at an acceleration voltage of 0.8–2.0 kV in SEM. In this study, we aimed to find an optimized electron energy range for VC acquisition using Auger electron spectroscopy (AES) for quantitative understanding.

This paper discusses the Failure Analysis methodology used to characterize 3D bonded wafers during the different stages of optimization of the bonding process. A combination of different state-of-the-art techniques were employed to characterize the 3D patterned and unpatterned bonded wafers. These include Confocal Scanning Acoustic Microscopy (CSAM) to determine the existence of voids, Atomic Force Microscopy (AFM) to determine the roughness of the films on the wafers, and the Double Cantilever Beam Test to determine the interfacial strength. Focused Ion Beam (FIB) was used to determine the alignment offset in the patterns. The interface was characterized by Auger Spectroscopy and the precession electron nanobeam diffraction analysis to understand the Cu grain boundary formation.

This paper discussed on how the importance of failure analysis to identify the root cause and mechanism that resulted in the MEMS failure. The defect seen was either directly on the MEMS caps or the CMOS integrated chip in wafer fabrication. Two case studies were highlighted in the discussion to demonstrate how the FA procedures that the analysts had adopted in order to narrow down to the defect site successfully on MEMS cap as well as on CMOS chip on MEMS package units. Besides the use of electrical fault isolation tool/technique such as TIVA for defect localization, a new physical deprocessing approach based on the cutting method was performed on the MEMS package unit in order to separate the MEMS from the Si Cap. This approach would definitely help to prevent the introduction of particles and artifacts during the PFA that could mislead the FA analyst into wrong data interpretation. Other FA tool such as SEM inspection to observe the physical defect and Auger analysis to identify the elements in the defect during the course of analysis were also documented in this paper.

This paper outlines a method that has been found to effectively reduce the charging effect on imide surfaces during Auger analysis. This methodology enables in-house Auger analysis on insulators in the semiconductor industry. The compositional analysis at the imide surface is as critical as analysis at the bond pad surface due to its impact on the reliability of the product. Current practice is the use of a thin Au/Pd coating to reduce the charging effect, but there are some drawbacks such as the creation of artifacts due to the presence of Au/Pd peaks in the spectrum. Apart from that, the signal to noise ratio (S/N) is reduced, masking the desired signal. When this scenario occurs, we implement a new combination method of a low angle incident beam along with special sample preparation. This method provides a spectrum with good S/N and no charging effects and eliminates the Au/Pd peak artifacts.

In wafer fabrication, Fluorine (F) contamination may cause fluorine-induced corrosion and defects on microchip Aluminum (Al) bondpads, resulting in bondpad discoloration or non-stick on pads (NSOP). Auger Electron Spectroscopy (AES) is employed for measurements of the fluorine level on the Al bondpads. From a Process control limit and a specification limit perspective, it is necessary to establish a control limit to enable process monitor reasons. Control limits are typically lower than the specification limits which are related to bondpad quality. The bondpad quality affects the die bondability. This paper proposes a simulation method to determine the specification limit of Fluorine and a Shelf Lifetime Accelerated Test (SLAT) for process monitoring. Wafers with different F levels were selected to perform SLAT with high temperature and high relative humidity tests for a fixed duration to simulate a one year wafer storage condition. The results of these simulation results agree with published values. If the F level on bondpad surfaces was less than 6.0 atomic percent (at%), then no F induced corrosion on the bond pads was observed by AES. Similarly, if the F level on bond pad surfaces was higher than 6.0 atomic per cent (at%) then AES measured F induced corrosion was observed.

The authors use electron spectroscopy for chemical analysis and Auger electron analysis to study the interaction of Cl and F with Al thin-films deposited as thin-films on Si wafers and as Al bondpads. The motivation behind the study is F contamination being the putative source of poor throughput at wafer probe. F species stemming from NH4F and XeF2 exposure behave quite differently from HF on the Al surface. Whereas HF tends to attack the Al metal and leave an extended oxygenated-fluorinated surface, NH4F and XeF2 promote the formation of a stable, non-deliquescent fluoride salt of aluminum. HCl is far less corrosive to Al than HF, leaving a thin chlorinated-oxygenated surface. Immersion of Al thin-films in tetra-methyl-ammonium hydroxide (TMAH) and NH4OH provided non-halogenated surfaces for comparison. With exposure to air, the surface coated with the fluorinated Al salt (NH4F) adsorbs oxygen from the air to form a segregated AlF3/Al2O3 bilayer that remains stable with a total thickness on the order of 5 nm to 10 nm. Furthermore, wafers treated with NH4F display stellar throughput performance at wafer test despite having surface F contamination. A mechanical rather than chemical model is proposed to explain the improved performance at wafer probe with the immersion of wafers in a bath containing fluoride salts before wafer probe.

Non-stick on pad (NSOP) is a yield limiting factor that can occur due to various reasons such as particle contamination, galvanic corrosion, Fluorine-induced corrosion, process anomalies, etc. The problem of NSOP can be mitigated through a careful process characterization and optimization. In this paper, a bondpad qualification methodology (OSAT) will be discussed. It will be argued that by employing different physical analysis techniques in a failure analysis of wafer fabrication, it is possible to perform comprehensive characterization studies of the Aluminum bondpad so as to develop a robust far backend of line process. A good quality Al bondpad must meet the following four conditions-OSAT: (i) it should be no discoloration (using Optical inspection); (ii) should be defect free (using SEM inspection); (iii) should be with low contamination level (such as fluorine and carbon contamination should be within a control limit) (using Auger analysis) and (iv) should have a protective layer on bondpad surface so as to prevent bondpad corrosion (using TEM).

This paper demonstrates a novel method of XTEM sample preparation for site-specific surface defect analysis using backside polishing. Analysis of three different types of site-specific surface defects was demonstrated using a novel backside XTEM sample preparation method. The details of the backside XTEM sample preparation method and some examples are reported in this paper. Comparing to Auger electron spectrometry (AES) results on similar defects, more detailed and precise information is observed using TEM analysis with this method. It is therefore a complementary technique to traditional AES analysis on surface defects for contamination with atomic level concentration. From the results, the sample preparation method can produce a clean, pristine surface that is well characterized and could be reproduced, successfully.

It is shown that a focused ion beam (FIB) grounding technique can be used to alleviate charge buildup on samples that would otherwise charge in the electron beam to the point where analysis by Auger electron spectroscopy (AES) was limited or impossible. FIB grounding alleviates the sample charging and permits AES analysis. The grounding technique is quick, easy and well understood as it has been used extensively for voltage-contrast analysis. The technique is shown to be useful for enabling analysis on electrically isolated conductive features as well as insulating samples.

A framework is presented for considering the relative strengths of Auger electron spectroscopy (AES)/scanning Auger microscopy (SAM) and scanning transmission electron microscopy–electron energy loss spectroscopy (STEM-EELS) when selecting a defect analysis technique. The geometry of the analysis volumes for each technique is visualized. The analysis volume for AES/SAM is shaped like a button while the STEM-EELS analysis volume is more like a thread extending throughout the thickness of the prepared sample. The usefulness of this framework is illustrated with the example of small defect particles. In this example the size and shape of the AES/SAM analysis volume is a better fit to the defect, thus it provides better chemical analysis while STEM provides better images of the defects.

A failure analysis flow is developed for surface contamination, corrosion and underetch on microchip Al bondpads and it is applied in wafer fabrication. SEM, EDX, Auger, FTIR, XPS and TOF-SIMS are used to identify the root causes. The results from carbon related contamination, galvanic corrosion, fluorine-induced corrosion, passivation underetch and Auger bondpad monitoring will be presented. The failure analysis flow will definitely help us to select suitable methods and tools for failure analysis of Al bondpad-related issues, identify rapidly possible root causes of the failures and find the eliminating solutions at both wafer fabrication and assembly houses.

The identification of foreign material at metal-oxide interface or at the poly-substrate interface by means energy dispersive spectroscopy (EDS) is very difficult. Auger depth profiling can be used as an alternative method to cross-section EDS analysis for the identification of very thin layers of foreign material in semiconductor devices. This article presents a sample preparation method adapted from a planar transmission electron microscopy sample preparation method so that Auger depth profiling can be used as a practical tool for identifying very thin layers of foreign materials at interfaces buried deep within semiconductor devices. The discussion covers the advantages, applications, and the procedure for performing the analysis. The high degree of control provided by the method gives an analyst the ability to easily thin down material layers to less than 100nm of a target layer, thereby significantly reducing sample preparation time as well as analysis time on the Auger tool.

Accurate characterization of the nitrogen concentration and distribution in ultra thin nitrided silicon gate oxide plays the same important role as the fabrication technology itself during the development of 90nm and beyond gate oxide manufacturing process. Based on the measurement results of XPS (X-ray photoelectron spectroscopy) as reference, a correlation study was taken between XPS and AES (Auger electron spectroscopy) data in this paper. The study shows that, by optimizing the experiment conditions of AES such as beam energy, beam current and take off angle, and introducing proper corrective factor, AES can be used as a useful and reliable characterization tool during the monitoring measurement of Nitrogen concentration in ultra thin (<2nm) nitrided silicon gate oxide.

Microcalorimeter based energy dispersive X-ray analysis (EDS) combines in a revolutionary way resolution of wavelength dispersive spectroscopy (WDS) with the ease of use of conventional EDS. The necessary operating temperatures (~100mK) for the superconducting sensor are supplied by a mechanical, maintenance free and fully automated cooling system, allowing the integration of the system not only in a traditional F/A environment, but also as an inline (cleanroom) installation. Typical examples of material analysis in everyday F/A work show that the detector exhibits an energy resolution of about 10 eV. With this performance, the solution of well known overlap problems existing for element combinations commonly used in semiconductor technology (peak separation of Ti/N, Ta/Si, W/Si) is possible. Structures of small volume can be investigated successfully, since the tool is optimized for work in the low energy range. The case of a failing TiN-layer showed that μcalorimeter EDS allows also thin film analysis: oxide layers with a thickness difference of a few nm can be distinguished; subsequent depth-profiling with Auger electron spectroscopy confirmed the results.

Fluorine contamination on Al bondpads will result in corrosion, affect quality of bondpads and pose problem such as non-stick on pad (NSOP) during wire bonding at assembly process. In this paper, a fluorine contamination case in wafer fabrication will be studied. Some wafers were reported to have bondpad discoloration and bonding problem at the assembly house. SEM, EDX, TEM, AES and IC techniques were employed to identify the root cause of the failure. Failure analysis results showed that fluorine contamination had caused bondpad corrosion and thicker native aluminium oxide, which had resulted in discolored bondpads and NSOP. It was concluded that fluorine contamination was not due to wafer fab process, but was due to the wafer packaging foam material. XPS/ESCA and TOF-SIMS advanced tools were used to study the chemical and physical failure mechanism of fluorine-induced defects. An unknown Al compound was found using XPS technique and identified it as [AlF6]3- using electrochemical theories and TOF-SIMS technique. This finding was very significance, as it helped developing a theoretical electrochemical model for fluorine-induced corrosion and helped understanding of the mechanism of fluorine-induced corrosion on aluminium bondpads. It was found that fluorine contamination had formed [AlF6]3-on the affected bondpads and it had caused further electrochemical reactions and formed some new products of (NH4)+ and OH-. Then [AlF6]3- and (NH4)+ ions combined and formed a corrosive complex compound, (NH4)3(AlF6), while the OH- reacted with Al and caused further corrosion.

A failure mode occasionally observed in multilayer ceramic capacitors (MLCC) is degradation of insulation resistance as the capacitor ages under temperature and electrical stress. The dielectric in MLCC can have a heterogeneous appearance when examined by optical microscope or SEM. This makes it difficult to identify features that could explain the root cause of failure or that could be used in devising inspection criteria for lot acceptance. Conventional cross sectioning in an epoxy mount leaves the sample unsuitable for examination in highvacuum equipment such as field emission scanning electron microscopy or Auger Electron Spectroscopy (AES) because epoxy outgasses and badly contaminates the high vacuum system. A novel twostep potting technique for sample preparation and inspection was developed to meet these challenges. This technique enabled us to perform electricallymonitored cross sectioning in combination with thermal inspection (infrared microscopy). Once a shorting site was identified, the sample was easily removed from the epoxy mount, allowing examination of the actual location of the short circuit in the field emission SEM (necessary to avoid sample charging). By precisely identifying the defect site, the chemistry of the defect could then be determined using electron spectroscopy and materials identification techniques [1,2,3].

This paper describes a failure analysis that effectively combined multiple analytic techniques to find the cause of I/O leakage in a flawed chip produced for an OEM (Original Equipment Manufacturer) product. Internal probing was initially used for defect isolation and a Tungsten (W) stud open circuit flaw was isolated by electrical characterization with internal probing. SEM (Scanning Electron Microscopy), TEM (Transmission Electron Microscopy, and FE-AES (Field Emission Auger Electron Spectroscopy) analysis with FIB (Focused Ion Beam) preparation were used for physical analysis. Cross-sectional SEM and TEM observations showed a gap with foreign material (FM) between the bottom of the metal line and the top of the W stud, possibly from the W CMP (chemical mechanical polish) process. FE-AES is effective for the analysis of light materials and their chemical composition, so a flat milling FIB process was used to prepare a cross-section for FE-AES analysis of the FM and the interfaces of the open defect. The spectra showed that the FM was traceable to the W CMP process. From these analytical results and problem reproduction experiments in the W CMP process on the manufacturing line, the failure mechanism was identified.

Discolored bondpads & non-stick failure in 0.6 μm wafer fab process with the hot Al alloy metallization was investigated. SEM, EDX & AES techniques were used to identify the root causes. Failure analysis results showed that discolored bondpads & non-stick failure were caused by TiN residue introduced during L95 bondpad opening wafer fab process. TiN residue on bondpad might have led to non-stick bondpad issue. The results also showed that it was difficult to determine the trace amount of TiN residue on bondpad using EDX technique due to its limitations. In this work, Auger surface analysis technique was used to determine TiN residue on bondpads with Al/TiW/Ti metallization. Auger results showed that Ti & N peaks were detected on discolored bondpads. It has resulted in non-stick bondpad failure. The solution to eliminate TiN residue on bondpads was to increase etch time at L95 bondpad opening wafer fab process. After using the new recipe with longer etch time, Auger results on the bondpads showed that no Ti & N peaks were detected and the bond-pull testing also passed.

The latest IC modification requirement is to decrease the resistivity of Focused Ion Beam (FIB) deposits, especially deposits within a FIB machined hole. The resistivity of platinum conductor deposited by FIB within a hole is much greater (5000-50000 μΩ-cm) than that deposited on a surface (~200 μΩ-cm) (1). Auger analysis of surface deposited platinum conductor gives the composition ratios as ~ 50% platinum, ~34% carbon, ~15% gallium and ~1 % Oxygen. The escape solid angle of the organic carrier is much less from a hole than from a surface; therefore, we find more of the non-conductive organic material is trapped inside the hole which increases the fill resistivity. With its planarization and multiple metal levels, advanced IC process technology forces contact to lower level metal to be through high aspect ratio holes. To make a low resistance contact through such a hole, deposited material must have a high ratio of platinum to carbon and Oxygen. An improved technique is needed to remove the organic carrier molecules and deposit material containing this higher platinum percentage. The way to achieve such deposition is to adjust gas arrival rate and beam current to produce a deposition rate that allows sufficient time for the organic carrier molecules to escape. Using this method, we can to obtain fill resistivity of about 1000-2500 μΩ-cm within high aspect ratio holes. This paper discusses in detail the technique to achieve such low resistivity in high aspect ratio holes. On the surface where space is not so limited, a greater deposition rate yields shorter times to resistance as well as better step coverage, but within a hole a lower resistivity material is needed to result in good conductance to lower level metal.