In DRAM devices, many failures only appeared in a specific operating state on chips during functional tests. Dynamic photon emission microscopy (D-PEM) is a useful technique in failure analysis for emitted photons when the device under test (DUT) is electrically exercised. Therefore, D-PEM analysis combined with specific external triggers in functional test can activate the chip, and thereby expand the range of detectable defects and increase the chances of finding a specific failure mode. In this study, we will discuss various cases of external triggers applied from the tester. This method can be used to detect emission which did not show up in conventional test condition in PEM method for localizing active fails in DRAM. Then, after localizing the site of failure, more detailed physical visualization by Focused Ion Beam (FIB) cross section image, Transmission Electron Microscope (TEM), and Energy Dispersive X-ray microscopy (EDX) revealed main causes of failure. We believe that our method could be a future solution for increasingly difficult and diverse failures modes in the DRAM industry.

Advanced nanoscale material characterization requires high lateral resolution and sensitivity. This paper presents a novel analytical system that integrates a liquid metal alloy ion source (LMAIS), magnetic sector secondary ion mass spectrometry (SIMS), and laser interferometer stage with focused ion beam (FIB) technology. This integration enables high-resolution 2D/3D structural visualization and precise surface analysis at the nanoscale. We demonstrate the system's enhanced capabilities in microelectronics applications, where it achieves unprecedented spatial resolution and analytical sensitivity. Our results show how this advanced nano-analysis platform expands the boundaries of materials science and semiconductor technology characterization.

This paper investigates the behavior of flux compounds under different curing conditions for two distinct flux materials. To explore this behavior, we conducted two separate experimental designs. In the first design, we varied the heating temperature (ranging from 40°C to 180°C) and tested with 0.1g of flux for 50 seconds. The second design involved varying the mass volume of flux (ranging from 0.02g to 0.1g) and testing for 300 seconds at 160°C. We employed FT-IR analysis to detect any changes in the functional groups present in the flux. The results indicate that flux exposed to different curing conditions undergoes decomposition of certain functional groups. This effect becomes more pronounced with increasing temperature and decreasing flux mass volume. TQ Analyst software quantified the significant variations in the IR spectra, revealing mismatches at different curing conditions.

In the field of failure analysis (FA) for semiconductor devices, the transmission electron microscope (TEM) as an analytical tool is integral to finding visible evidence of defects and their root cause. Especially as device features shrink, imaging and analyzing increasingly subtle defects requires detailed elemental analysis. In this work, elemental analysis using an aberration-corrected TEM at different accelerating voltages (200 kV and 80 kV) is discussed. The impact of accelerating voltage on elemental analysis with regards to Electron Energy Loss Spectroscopy (EELS) and Energy Dispersive X-Ray Spectroscopy (EDS) is of central focus. Two case studies involving TEM samples of different thicknesses are presented that clearly indicate important differences in the analytical data collected at different accelerating voltages. The work revealed that for elemental analysis of thick TEM samples (100 nm and over) 200 kV is preferred, and for thin samples, 80 kV provides superior signal in EDS and EELS.

This study investigates the application of 3D electron tomography to enhance transmission electron microscopy (TEM)-based failure analysis of 3D FinFET transistors. Traditional TEM analysis is challenged by projection effects due to the thickness of the sample, complicating accurate defect characterization in miniaturized semiconductor structures. The defects seen by conventional (2D projection) TEM imaging are unclear and difficult to interpret. Leveraging scanning transmission electron microscopy (STEM) and energy dispersive X-ray spectroscopy (EDS) tomography techniques, the study presents detailed examinations of two semiconductor samples exhibiting high leakage currents. Results reveal etched-out epitaxial regions subsequently filled with gate materials, critical for understanding device failure. By digitally reconstructing TEM lamellae in three dimensions, this approach overcomes projection artifacts and precisely localizes defects. The findings underscore the efficacy of 3D electron tomography in semiconductor failure analysis, offering insights crucial for improving device reliability and manufacturing processes in advanced semiconductor technologies.

Integrated capacitors use metal plates such as in Metal-Insulator-Metal (MIM) and Metal-Oxide-Metal (MOM) capacitors while Polysilicon and Silicon (Si) substrate for metal-oxide-semiconductor (MOS) capacitors. Three major challenges and solutions were discussed in this technical paper. First, the failure site localization of a subtle defect in the capacitor plates. To determine the specific location of the defect site, Electron Beam Induced Current (EBIC) analysis was performed while the part was biased using a nano-probe set-up under Scanning Electron Microscopy (SEM) environment. Second, Failure Mechanism contentions between Electrically Induced Physical Damage (EIPD) or Fabrication process defect particularly, for damage site that is not at the edge of the capacitor and without obvious manifestations of Fabrication process anomalies such as bulging, void, unetched material or shifts in the planarity of the die layers. To further understand the defect site, Scanning Transmission Electron Microscopy (STEM) coupled with Energy-Dispersive X-ray Spectroscopy (EDS) were utilized to obtain high magnification imaging and elemental area mapping. Third, misled conclusion to be an EIPD site manifested by burnt and reflowed metallization. The EIPD site was only a secondary effect of a capacitor dielectric breakdown. This has been uncovered after understanding the circuit connectivity, inspections of the capacitors connected to the EIPD site, fault isolation and further physical failure analysis were performed. As results of the Failure Analysis (FA), Customer and Analog Devices Incorporated (ADI) manufacturing hold lots were accurately dispositioned and related corrective actions were precisely identified and implemented.

Power MOSFETs are electronic devices that are commonly used as switches or amplifiers in power electronics applications such as motor control, audio amplifiers, power supplies and illumination systems. During the fabrication process, impurities such as copper can become incorporated into the device structure, giving rise to defects in crystal lattice and creating localized areas of high resistance or conductivity. In this work we present a multiscale and multimodal correlative microscopy workflow for the characterization of copper inclusions found in the epitaxial layer in power MOSFETs combining Light Microscopy (LM), non-destructive 3D X-ray Microscopy (XRM), Focused-Ion Beam Scanning Electron Microscopy (FIB-SEM) tomography coupled with Energy Dispersive X-ray Spectroscopy (EDX), and Transmission Electron Microscopy (TEM) coupled with Electron Energy Loss Spectroscopy (EELS). Thanks to this approach of correlating 2D and 3D morphological insights with chemical information, a comprehensive and multiscale understanding of copper segregations distribution and effects at the structural level of the power MOSFETs can be achieved.

Static random-access memory (SRAM) is a type of device that requires the highest reliability demands for integration density and process variations. In this study, we focus on single bit cell SRAM failures. These failures can be categorized as Hard bit cell failure, where bit cells fail the read or write operation under both higher and lower supply voltages, and Soft Bit cell failure, where failures occur at either higher or lower voltage. The analysis on SRAM Soft failure is further divided as VBOX High and VBOX Low failure, which depends on the failure mode supply voltage. With transistor dimensions continuously shrinking, the analysis of SRAM errors imposes tremendous challenges due to their small footprint. In this paper, a thorough failure analysis procedure is described for solving an SRAM yield loss issue. Different analysis techniques were applied and compared to narrow down the failure to the final root cause, including nanoprobing, Focus Ion Beam (FIB) cross-section, Scanning Spreading Resistance Microscopy (SSRM), Transmission Electron Microscopy (TEM), Electron Energy Loss Spectroscopy (EELS), Scanning Capacitance Microscopy (SCM), and stain etch.

Sulfur corrodes silver metal in a continuous reaction. This corrosion is also found in semiconductor industry processes for the application of silver into Backside Grinding & Backside Metal (BGBM). In this paper two experiments were conducted for the sulfide corrosion behavior in a Circuit Probing (CP) clean room environment. They were Mixed Flowing Gas (MFG) and clean room environment exposure test. The MFG test of this research was conducted in a testing chamber with temperature, relative humidity, and concentration of H2S were carefully controlled and monitored. The MFG test conditions included the test temperature of 25°C, relative humidity of 75 %, and H 2 S gas concentration of 10 ppb. And the MFG tests lasted for over 72 hours. The X-ray photoelectron spectroscopy (XPS) was used to analyze the elements composition and Ag 2 S film thickness of the MFG test samples. The second test of this research was the direct exposure experiment. The silicon samples deposited with appropriate silver layer thickness were exposed in CP fab clean room environment with H 2 S concentration well monitored. The XPS analysis results of the corresponding exposure test samples indicated that the Ag 2 S contamination would continue to develop and wouldn't saturate. This would be indicative for the management of Ag 2 S contamination control. The results of MFG and Exposure test were help for Ardentec to setup Ag 2 S corrosion methodology. All the managements were applied into daily operation of the BGBM semiconductor products.

Failure analysis of small contamination at the surface and sub-surface interface represents a major set of common microelectronics and semiconductor issues. The application of O-PTIR spectroscopy analyses provides flexibility to sample preparation and improves sensitivity to very small levels of contamination even below <1 micron in layers or particles on or just below the surface. The detection of this contamination can be limited if only bright field imaging is used to contrast the region of interest (ROI) and the surrounding structure. Adding fluorescence microscopy is an additional imaging technique that adds another layer of chemical specificity and provides locations of unseen ROI’s for additional IR and Raman spectral analysis.

For device qualification in harsh environments (space, avionic and nuclear), radiation testing identifies the sensitivity of the devices and technologies and allows to predict their degradation in these environments. In this paper, the analysis of the electrical characteristics and of the failure of a commercial SiC MOSFET after a Single Event Burnout (SEB) induced by proton irradiation are presented. The goal is to highlight the SEB degradation mechanism at the device and die levels. For failed devices, the current as a function of the drain-source bias (VDS) in off-state (VGS=0V) confirms the gate rupture. For the die analysis, Scanning Electron Microscopy (SEM) investigations with energy-dispersive X-ray spectroscopy (EDX) analysis reveals the trace of the micro-explosion related to the catastrophic SEB inside the SiC die. With a fire examination, similar to a blast, the SEM analysis discloses damages due to the large local increase of the temperature during the SEB thermal runaway, leading to the thermal decomposition of a part of the SiC MOSFET and the combustion with gaseous emissions in the device structure.

In this work we have investigated the results obtained using fault isolation techniques such as EMMI, OBIRCH and OBIC on a Wide band gap power device and in particular a 4H-SiC. We used YLF laser and Green Laser and showed the differences in the resulting hot spots. In the selected point, FIB cross sectioning and EDS analysis was performed. Once that the defect was shown, the differences the fault isolation results were discussed.

This paper describes a new infrared (IR) technique that offers sub-micron spatial resolution with a pump-probe scheme that can offer simultaneous collection of IR and Raman spectra at the same spatial resolution. The technique uses a single beam to collect both IR and Raman spectra using a technique called Optical Photothermal Infrared (O-PTIR). The O-PTIR technique provides constant spatial resolution over the entire mid-IR range due to the use of a fixed wavelength probe beam at 532 nm. The paper provides examples that highlight the advantages of the novel technique for addressing challenges that are commonly observed in the failure and contamination analysis community.

Secondary ion mass spectrometry (SIMS) is a well-established method in semiconductor manufacturing process control and development for trace metal and organic contaminant detection, as well as for depth profiling of ultra-thin film stacks and total dopant concentrations. Using a focused ion beam (FIB) as the primary ion beam provides a versatile and highly sensitive analytical technique with lateral resolution down to a few tens of nanometers, an appropriate technique for targeted failure analysis on functional device structures. This paper presents an example to show the potential of FIB-SIMS to support failure analysis, concentrating on practical aspects of the technique.

This paper describes the new Cameca Akonis secondary ion mass spectrometry (SIMS) tool, which was developed to fill a critical gap in semiconductor fabrication processes by providing high throughput, high precision detection for implant profiles, composition analysis, and interfacial data directly in the semiconductor manufacturing line. The system enables automation in the primary ion column to ensure repeatability across tools for fabrication-level process control and tool-to-tool matching.

In today’s advanced technology world, electronic devices are playing a key role in modern semiconductor products to improve the energy proficiency. These devices are required to be contamination free especially on the bond pad with good adhesion before wire bonding process at the back end. Contamination on the bond pad leads to reliability issues such as pad corrosion, delamination and failure leading to leakage and open fails of electronic devices. Therefore, detection accuracy and sensibility of contamination is important. Auger analysis is the most suitable technique to check bond pad contamination. Auger electron spectroscopy has the capability of analyzing compositional information with excellent spatial resolution. However, charging, noise or artifact is known to be a major concern to the characterization of insulating materials. This paper outlines the strategy that has been utilized to minimize the artifact, noise or charging impact for Auger investigation on a smaller bond pad surrounded by imide passivation layers. The imide passivation layer normally causes the charging effect during Auger analysis, which makes the Auger analysis difficult to be proceed. In addition to that, the charging effect leads to inaccurate analysis. In this paper, we demonstrate a sample preparation method to minimize the charging and artifact of Auger analysis especially for small bond pads.

This presentation shows how transmission electron microscopy (TEM) is used in semiconductor failure analysis to locate and identify defects based on their physical and elemental characteristics. It covers sample preparation methods for planar, cross-sectional, and elemental analysis, reviews the capabilities of different illumination and imaging modes, and shows how beam-specimen interactions are employed in energy dispersive (EDS) and electron energy loss spectroscopy (EELS). It describes the various ways transmission electron microscopes can be configured for elemental analysis and mapping and reviews the advantages of scanning TEM (STEM) approaches. It also provides an introduction to energy-filtered TEM (EFTEM) and how it compares with other TEM imaging techniques.

This presentation covers ion beam analytical tools, their capabilities, and uses. It provides an overview of ion sources, examines emerging trends in surface analysis, and assesses the potential of ultrafast lasers for panoscopic patterning, athermal ablation, and elemental analysis. It compares and contrasts liquid metal, gas field, and plasma sources and presents examples highlighting the capabilities of FIB-SIMS and FIB-SEM Auger/XPS surface analysis techniques. It also introduces computationally guided microspectroscopy (CGM) and assesses its potential impact on multi-variant analysis, point spread deconvolution, and compressed sensing.

This paper presents the results of an investigation to gain a better understanding of the impact of wafer substrate copper (Cu) contamination on FinFET devices. A chip from a wafer free of Cu contamination and several chips near a Cu contaminated wafer edge were sampled for chemical, structural, and morphological analysis and electrical device performance testing. The contaminated wafer was also annealed at high temperature, trying to drive Cu diffusion further into the Si substrate. TEM analysis revealed that the Cu interacted with Si to form a stable η-Cu 3 Si intermetallic compound. SIMS analysis from the backside of the wafer detected no Cu even after most of the backside material was removed. Likewise, electrical nanoprobing showed no parametric drift in the FinFETs near the edge of the wafer, comparable to device behavior in a Cu-free Si substrate. These results indicate that the formation of η-Cu 3 Si with a well-defined crystalline structure and stable stoichiometry immobilizes Cu diffusion in the Si substrate. In other words, the impact of Cu diffusion in silicon has no effect on device performance as long as η-Cu 3 Si does not form in the FinFET channel or short any structures within the chip.

This paper provides an overview of the semiconductor analysis process at BMW. It explains how it was developed and how it differs from the failure analysis process used in semiconductor fabs. It describes the general process flow from first analyses through descending levels of localization at different length scales. It discusses sample preparation procedures, test methods and equipment, and advanced techniques. In the work presented here, the authors explain how they combined ToF-SIMS with STEM lamella preparation in a FIB-SEM, which allowed them to correlate concentration variances in an underlying layer with surface anomalies discovered during light microscope inspection.