Static random access memory (SRAM) can occupy up to 90% of the die surface in a microprocessor and is often laid out with even more aggressive design rules than logic circuitry, which makes it more prone to manufacturing defects and more sensitive to process variations. As a result, SRAM is often chosen to be the process qualification vehicle during technology development and the yield learning vehicle during product manufacturing. Consequently, fast and accurate analysis of SRAM failure is critical to success on many levels. In this paper, we present a defect identification method that combines design for test (DFT) features, direct bitcell access (DBA), and nondestructive fault isolation techniques. With examples and case studies, it is shown how the approach makes use of electrical failure analysis data to greatly reduce the cycle time of root cause identification in the early stages of new technology development.

A key point to guarantee electronic device quality is device qualification. This part of the process is a significant contributor to the time and cost of the development and production of any electronic device. A device is required to perform a task and its operational lifetime is a key issue for the end user. The more sensitive the qualification technique is, the faster marginalities in the device parameters could be observed. Dynamic Laser Stimulation techniques fill this requirement and could be used in conjunction with traditional qualification procedures.