In critical fields such as automotive, medicine, and defense, ensuring the reliability of microelectronics has been paramount given the extensive nature of their globalized supply chain. Automated visual inspection (AVI) of printed circuit boards (PCBs) offers a solution through computer vision and deep learning to automate defect detection, component verification, and quality assurance. In this paper, our research follows this precedent by introducing a novel dataset and annotations to train artificial intelligence (AI) models for extracting PCB connectivity components. Utilizing high-resolution images, and state-of-the-art instance segmentation models, this study aims to examine the difficulties in this implementation and lay the groundwork for more robust automated visual inspection.

One of the biggest problems in the integrated circuit industry as of late has been counterfeiting. Because the counterfeiting process is still quite crude in its nature, visual inspection has become a cornerstone process. This paper discusses the significance of the documentation post decapsulation during internal visual inspection. In order to properly inspect for counterfeit components, it is critical to understand that one inspection method alone will not provide enough information to detect all counterfeits. Proper counterfeit detection involves detailed inspection of multiple aspects of a component in order to gather as much information as possible, so that each component can be successfully labeled counterfeit or authentic. A collaboration of multiple inspection processes, comparison of data amongst sample testing batch, comparison to "known good/golden sample" when possible, and documentation of findings results in the highest confidence level of authenticity of counterfeit labeling of components.

Counterfeit components have been defined as a growing concern in recent years as demand increases for reducing costs. In fact the Department of Commerce has identified a 141% increase in the last three years alone. A counterfeit is any item that is not as it is represented with the intention to deceive its buyer or user. The misrepresentation is often driven by the known presence of defects or other inadequacies in regards to performance. Whether it is used for a commercial, medical or military application, a counterfeit component could cause catastrophic failure at a critical moment. The market for long life electronics, based on commercial off the shelf (COTS) parts, such as those used in medical, military, commercial depot repair, or long term use applications (e.g. street and traffic lights, photovoltaic systems), seems to create a perfect scenario for counterfeiters. With these products, components wear out and need to be replaced long before the overall product fails. The availability of these devices can be derived in many ways. For example, a typical manufacturer may render a component obsolete by changing the design, changing the functionality, or simply discontinuing manufacture. Also, the parts that are available after a design has been discontinued are often distributed by brokers who have very little control over the source or supply. Recycling of devices has also emerged as a means of creating counterfeit devices that are presented as new. And finally, as demand and price increase, the likelihood of counterfeits also increases. This paper will address the four unique sources of counterfeit components and insight into how they occur. Detection methodologies, such as visual inspection, mechanical robustness, X-Ray, XRF, C-SAM, Infrared Thermography, electrical characterization, decapsulation, and marking evaluations, will be compared and contrasted, as well as multiple examples of counterfeit parts identified by DfR.

Solder bulging is detected on the exposed paddle of Device A after burn-in causing the affected units to fail the coplanarity criteria. The affected units show up at random burn-in board socket locations and occur with varying frequency. Potential causes are plotted through an Ishikawa diagram which reveal fusion and creep as the potential mechanisms behind the solder bulging phenomenon. This paper seeks to determine the mechanism behind the solder bulging phenomenon via a 2-step metallographic investigation through (i) material deformation characterization and (ii) deformation mechanism simulation. In material deformation characterization, visual inspection on affected units show that the solder bulge is generally circular and is located on the center of the exposed paddle. Moreover, SEM/EDX analysis reveal that the solder bulge is not caused by a foreign contaminant or a compositional anomaly in the solder plating. On the other hand, deformation mechanism simulation involves the metallographic comparison between controlled simulations of fusion and creep versus the actual unit with solder bulge. Metallographic inspection reveal that the grain size and grain shape of the solder bulge possess the characteristics of creep phenomenon. Additionally, investigation on the burn-in (BI) process conditions also supports creep over fusion as the mechanism behind the solder bulging phenomenon. The static stress induced by the socket on the package at elevated temperature caused the solder plating to creep towards the free area which is the hole on the bottom of the socket.

Printed circuit board assembly with lead free solder is now a reality for most global electronics manufacturers. Extensive research and development has been conducted to bring lead free assembly processes to a demonstrated proficiency. Failure analysis has been an integral part of this effort and will continue to be needed to solve problems in volume production. Many failure analysis techniques can be directly applied to study lead free solder interconnects, while others may require some modification in order to provide adequate analysis results. In this paper, several of the most commonly applied techniques for solder joint failure analysis will be reviewed, including visual inspection, x-ray radiography, mechanical strength testing, dye & pry, metallography, and microscopy/photomicrography, comparing their application to lead bearing and lead free solder interconnects. Common failure modes and mechanisms will be described with examples specific to lead free solders, following PCB assembly as well as after accelerated reliability tests.