Abstract Reverse engineering (RE) is the only foolproof method of establishing trust and assurance in hardware. This is especially important in today's climate, where new threats are arising daily. A Printed Circuit Board (PCB) serves at the heart of virtually all electronic systems and, for that reason, a precious target amongst attackers. Therefore, it is increasingly necessary to validate and verify these hardware boards both accurately and efficiently. When discussing PCBs, the current state-of-the-art is non-destructive RE through X-ray Computed Tomography (CT); however, it remains a predominantly manual process. Our work in this paper aims at paving the way for future developments in the automation of PCB RE by presenting automatic detection of vias, a key component to every PCB design. We provide a via detection framework that utilizes the Hough circle transform for the initial detection, and is followed by an iterative false removal process developed specifically for detecting vias. We discuss the challenges of detecting vias, our proposed solution, and lastly, evaluate our methodology not only from an accuracy perspective but the insights gained through iteratively removing false-positive circles as well. We also compare our proposed methodology to an off-the-shelf implementation with minimal adjustments of Mask R-CNN; a fast object detection algorithm that, although is not optimized for our application, is a reasonable deep learning model to measure our work against. The Mask R-CNN we utilize is a network pretrained on MS COCO followed by fine tuning/training on prepared PCB via images. Finally, we evaluate our results on two datasets, one PCB designed in house and another commercial PCB, and achieve peak results of 0.886, 0.936, 0.973, for intersection over union (IoU), Dice Coefficient, and Structural Similarity Index. These results vastly outperform our tuned implementation of Mask R-CNN.

Abstract Characterization of Computed Tomography X-Ray ionizing dose will be presented along with a methodology to protect space bound flight hardware from exceeding total ionizing dose (TID) budget prior to mission completion.

Abstract Next generation assembly/package development challenges are primarily increased interconnect complexity, density, and multi-layer/multi-stacked packages with ever shorter development time. The results of this trend present some distinct challenges for the analytical tools and techniques to support this technology roadmap. The key challenge in the analytical tools and techniques is the development of nondestructive imaging for improved time to information. The 3D X-ray Computed tomography (CT) system named “X-Tek NGI” has been co-developed by Intel and X-Tek to address this need. The current paper will discuss the configuration and several applications where this tool has been applied successfully to solve current package technology development issues and provide package construction analysis (including enabled components). This paper will discuss the details of the system configuration, examples together with the current limitations and future direction for non-destructive package failure analysis.