Power MOSFETs are electronic devices that are commonly used as switches or amplifiers in power electronics applications such as motor control, audio amplifiers, power supplies and illumination systems. During the fabrication process, impurities such as copper can become incorporated into the device structure, giving rise to defects in crystal lattice and creating localized areas of high resistance or conductivity. In this work we present a multiscale and multimodal correlative microscopy workflow for the characterization of copper inclusions found in the epitaxial layer in power MOSFETs combining Light Microscopy (LM), non-destructive 3D X-ray Microscopy (XRM), Focused-Ion Beam Scanning Electron Microscopy (FIB-SEM) tomography coupled with Energy Dispersive X-ray Spectroscopy (EDX), and Transmission Electron Microscopy (TEM) coupled with Electron Energy Loss Spectroscopy (EELS). Thanks to this approach of correlating 2D and 3D morphological insights with chemical information, a comprehensive and multiscale understanding of copper segregations distribution and effects at the structural level of the power MOSFETs can be achieved.

Failure analysis of small contamination at the surface and sub-surface interface represents a major set of common microelectronics and semiconductor issues. The application of O-PTIR spectroscopy analyses provides flexibility to sample preparation and improves sensitivity to very small levels of contamination even below <1 micron in layers or particles on or just below the surface. The detection of this contamination can be limited if only bright field imaging is used to contrast the region of interest (ROI) and the surrounding structure. Adding fluorescence microscopy is an additional imaging technique that adds another layer of chemical specificity and provides locations of unseen ROI’s for additional IR and Raman spectral analysis.

Near Infra-Red (NIR) techniques such as Laser Voltage Probing/Imaging (LVP/I), Dynamic Laser Stimulation (DLS), and Photon Emission Microscopy (PEM) are indispensable for Electrical Fault Isolation/Electrical Failure Analysis (EFI/EFA) of silicon Integrated Circuit (IC) devices. However, upcoming IC architectures based on Buried Power Rails (BPR) with Backside Power Delivery (BPD) networks will greatly reduce the usefulness of these techniques due to the presence of NIR-opaque layers that block access to the transistor active layer. Alternative techniques capable of penetrating these opaque layers are therefore of great interest. Recent developments in intense, focused X-ray microbeams for micro X-Ray Fluorescence (μXRF) microscopy open the possibility to using X-rays for targeted and intentional device alteration. In this paper, we will present results from our preliminary investigations into X-ray Device Alteration (XDA) of flip-chip packaged FinFET devices and discuss some implications of our findings for EFI/EFA.

Integrated circuit (IC) delayering workflows are highly reliant on operator experience to determine processing end points. The current method of end point detection during IC delayering uses qualitative correlations between the thickness and color of dielectric films observed via optical microscopy. The goal of this work is to quantify this relationship using computer vision. As explained in the paper, the authors trained a convolutional neural network to estimate the thickness of dielectric films based on images and measurements recorded during processing. The trained vision model explained 39% of the variance in dielectric film thickness with a mean absolute error of approximately 47 nm. The paper describes the entire workflow, including verification testing, and addresses the primary sources of error.

Backside silicon removal provides an avenue for a number of modern non-destructive and circuit edit techniques. Visible light microscopy, electron beam microscopy, and focused ion beam circuit edit benefit from a removal of back side silicon from the integrated circuit being examined. Backside milling provides a potential path for rapid sample preparation when thinned or ultrathinned samples are required. However, backside milling is an inherently destructive process and can damage the device function, rendering it no longer useful for further nondestructive analysis. Recent methods of backside milling do not guarantee device functionality at a detected end point without a priori knowledge. This work presents a methodology for functional end point detection during backside milling of integrated circuit packaging. This is achieved by monitoring second order effects in response to applied device strain, which guide the milling procedure, avoiding destructive force as the backside material is removed. Experimental data suggest a correlation between device power consumption waveforms and second order effects which inform an in situ functional end point. Keywords: functional end point, side-channel analysis, backside thinning, milling, machine learning, second order effects

Counterfeit electronics constitute a fast-growing threat to global supply chains as well as national security. With rapid globalization, the supply chain is growing more and more complex with components coming from a diverse set of suppliers. Counterfeiters are taking advantage of this complexity and replacing original parts with fake ones. Moreover, counterfeit integrated circuits (ICs) may contain circuit modifications that cause security breaches. Out of all types of counterfeit ICs, recycled and remarked ICs are the most common. Over the past few years, a plethora of counterfeit IC detection methods have been created; however, most of these methods are manual and require highly-skilled subject matter experts (SME). In this paper, an automated bent and corroded pin detection methodology using image processing is proposed to identify recycled ICs. Here, depth map of images acquired using an optical microscope are used to detect bent pins, and segmented side view pin images are used to detect corroded pins.

In high numerical aperture (NA) subsurface imaging, we can obtain higher resolution in selected directions at the expense of resolutions in other directions, utilizing the vectorial properties of polarized light. In this work, we propose an image fusion framework that produces a single image with higher resolution and image quality in all directions by processing multiple images acquired by varying the polarization direction of the linearly polarized input laser light.

Advanced package technology often includes multi-chips in one package to accommodate the technology demand on size & functionality. Die tilting leads to poor device performance for all kinds of multi-chip packages such as chip by chip (CbC), chip on chip (CoC), and the package with both CbC and CoC. Traditional die tilting measured by optical microscopy and scanning electron microscopy has capability issue due to wave or electron beam blocking at area of interest by electronic components nearby. In this paper, the feasibility of using profilemeter to investigate die tilting in single and multi-chips is demonstrated. Our results validate that the profilemeter is the most profound metrology for die tilting analysis especially on multi-chip packages, and can achieve an accuracy of <2μm comparable to SEM.

High resolution scanning probe microscopy techniques combined with infrared (IR) light sources offer unique solutions to combined chemical/mechanical/electrical characterization of defects in nanoscale dimensions. Previously, atomic force microscopy combined with infrared (AFM-IR) technology has demonstrated its capability to characterize nano-patterned metal/low-k dielectrics, nanoscale organic contaminants, and directed self-assembly of block co-polymers used for advanced micro/nanofabrications. In this paper, two complementary nanoscale chemical analysis techniques, photothermal AFM-IR and scattering type scanning near-field optical microscopy, are implemented to isolate and characterize microelectronic device cross-sections. It is observed that both techniques are able to detect patterned features with a half-pitch less than 15 nm.

Fault isolation is an important initial component of the failure analysis investigation as it provides the first indicator of the defect physical location. The most broadly familiar fault isolation techniques include photoemission microscopy (PEM), optical beam induced resistance change (OBIRCH) and liquid crystal analysis (LCA). Each of these techniques has their own strengths but also drawbacks which can impede the analysis by either not providing a well isolated defect location or causing damage to the defect region. For some types of defects, photoemission and liquid crystal analysis may create local heating of the device which can distort the defect and mask the root cause of the failure. These techniques also rely on optical microscopy which has low resolution compared to the feature size of current technologies. In addition, each technique may not highlight the defect site itself; only pointing the analyst to the defective circuit within the sample. Electron Beam Induced Current (EBIC) and Electron Beam Absorbed Current (EBAC) microscopy provides solutions to these complications. In this paper we describe some very effective approaches by using these beam-based techniques in conjunction with traditional methods. As introduction, we have provided some interesting case studies whereby EBIC/EBAC have been used in conjunction with FIB circuit edits and scan diagnostic results to narrow the defect search areas. We focus the paper on some less common applications of cross sectional EBIC/EBAC as well as utilizing an AC coupled configuration to activate more subtle defect sites. We conclude with two examples where AC coupled cross-sectional EBIC is needed to highlight the cause of the failure.

Ex situ lift out (EXLO) is performed outside of the FIB instrument on a system basically consisting of a light optical microscope, stage, and manipulator. EXLO may be used to lift out very large specimens prepared using plasma FIB instruments. This paper combines a vacuum micropipetting module with an EXLO station, making use of both suction vacuum forces and adhesion forces for the pick and place of a FIB milled free specimen onto a slotted EXpressLO grid. The geometry for manipulation to EXpressLO grids is detailed in this paper. It is observed that the vacuum assisted lift out optimizes specimen positioning for easy placement on the novel EXpressLO grid. Once on the new grid, an electron transparent specimen may be analyzed directly by S/TEM or other analytical techniques. The specimen on this grid can also be further FIB milled or processed prior to analysis.

A Flip Chip sample failed short between power and ground. The reference unit had 418Ω and the failed unit with the short had 16.4Ω. Multiple fault isolation techniques were used in an attempt to find the failure with thermal imaging and Magnetic Current Imaging being the only techniques capable of localizing the defect. To physically verify the defect location, the die was detached from the substrate and a die cracked was seen using a visible optical microscope.

Transmission electron microscopy (TEM) plays an important role in the structural analysis and characterization of materials for process evaluation and failure analysis in the integrated circuit (IC) industry as device shrinkage continues. It is well known that a high quality TEM sample is one of the keys which enables to facilitate successful TEM analysis. This paper demonstrates a few examples to show the tricks on positioning, protection deposition, sample dicing, and focused ion beam milling of the TEM sample preparation for advanced DRAMs. The micro-structures of the devices and samples architectures were observed by using cross sectional transmission electron microscopy, scanning electron microscopy, and optical microscopy. Following these tricks can help readers to prepare TEM samples with higher quality and efficiency.

Sparse image reconstruction techniques have been used to recover high frequency information lost during the acquisition process in different imaging domains, such as ultrasound, synthetic aperture radar, optical microscopy, and astronomical and microscopic imaging. In this work, a signal processing framework is proposed to estimate the Point Spread Function (PSF) of the dark-field subsurface microscopy system from observation data. This PSF is incorporated into an image reconstruction framework, which can be formulated with two different image reconstruction techniques, regularized image reconstruction and dictionary-based image reconstruction. It is observed that both techniques provide at least 12% resolution improvement; lines with 224 nm spacing were localized after resolution improvement while lines with 252 nm spacing are at the limit of localization in experimental data. However, dictionary-based image reconstruction provides higher edge resolution and maintains the homogeneity of the intensity within the structures.

This study investigated the origin of detrimental high ohmic behavior of contacts by means of analytical electron microscopy. The root cause for the high resistivity could be identified as delamination of the contact bottom in the nanometer range. Based on the results, we were able to establish a method to identify thin oxide layers using analytical methods without being able to spatially resolve them in a combined focused ion beam instrument and scanning electron microscope.

We report on aberration compensation in an aplanatic solid immersion lens microscope used for high-resolution backside inspection of silicon integrated circuits. The imaging quality of aplanatic SIL microscope is shown to be significantly degraded by aberrations, especially when the silicon integrated circuit samples have thicknesses that are more than a few micrometers thicker or thinner than ideal. We describe and demonstrate a technique to recover near-ideal imaging quality by compensating those aberrations using a MEMS deformable mirror. The mirror, located in an optical plane conjugate to the microscope objective, is shaped in a way that counteracts spherical aberration errors associated with non-ideal sample thickness.

This paper demonstrates a new de-process flow for MEMS motion sensor failure analysis, using layer by layer deprocessing to locate defect points. Analysis tools used in this new process flow include IR optical microscopy, thermal system, SEM and a cutting system to de-process of MEMS motion sensor and successful observation defect points.

A novel method for obtaining diffraction limited high resolution images, and increased signal to noise ratio (SnR), for imaging and probing silicon based complementary metal oxide semiconductor field effect transistor (CMOS, and MOSFET) integrated circuits (IC), is presented. The improved imaging is based on the sub wavelength features’ asymmetric layout, which is dictated by the lithography design rules constrain in CMOS IC and their interactions with polarized light. This asymmetry in layout and the inherent stress engineering on the CMOS IC, produce both dichroism and birefringence in silicon (Si). An elegant design enabled us to obtain two images with orthogonal polarization detection to take advantages of the dichroism and birefringence in Si based CMOS IC. Differential Polarization Image (DPI) is obtained by subtracting the two orthogonal polarization resolved images. On infrared emission microscopes (IREM), DPI in optical imaging mode and DPI plus probing [DPIP] in emission mode, showed 2X or more in terms of optical resolution (imaging mode) and 2X or more SnR (emission-probing mode) improvements. Striking images in probing mode, revealing previously “invisible” emission, were demonstrated.

In this study, the challenges to transfer the microelectronics failure analysis techniques to the photovoltaic industry have been discussed. The main focus of this study was the PHEMOS as a tool with strong technological research capacity developed for microelectronics failure analysis, and OBIC (Optical Beam Induced Current) as a non-destructive technique for detecting and localizing various defects in semiconductor devices. This failure analysis tool was a high resolution optical infrared photon emission microscope used mainly in microelectronics for qualitative analysis and localization of semiconductor defects. Such failure analysis equipment was designed to meet requirements for modern microelectronic devices. Characterization of current photovoltaic device often requires quantitative analysis and should provide information about the electrical and material properties of the solar cell. Therefore, in addition to the demand for further data processing of the obtained results we had to study the corresponding operating regime of solar cells to allow for a correct interpretation of measurement results. In this paper, some of the related problems we faced during this study, e.g. large amount of data processing, the spatial misalignment of the images obtained as EL (Electroluminescence) and IR-LBIC (Infrared Light Beam Induced Current), the implemented laser wavelength, its profile and power density for IR-LBIC measurement. These topics have been discussed in detailed to facilitate a reliable transfer of these techniques from microelectronics to the photovoltaic world.

Image enhancement algorithm by combining brightfield and darkfield images is presented on this paper. The result combines the unique features of each illumination plus the power of differential interference contrast (DIC) even in the absence of DIC hardware and sophisticated software. The effectivity of the method is illustrated on actual samples with height variation.