During the last few years the drop test has become more and more important for electronic handheld components. Drop test reliability for lead-free solder interconnects is an extreme challenge today. Thus, the need for improved micro structural diagnostics of new material combinations and crack detection methods has increased. The target of this paper is to summarize detection and analysis methods for solder joint cracks, material characterization [1] and preparation methods of assembled printed circuit boards (PCB) after a drop test to completely understand lead-free solder interconnect reliability in fine pitch ball grid array packages (FBGA). In particular, we will introduce the outstanding advantages of embedded cross-sections combined with ion beam polishing (IBP), dye- or rather resin-penetration, selective tin etch and micro-hardness measurements.

The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.

Via in pad PCB (Printed Circuit board) technology for passive components such as chip capacitors and resistors, provides the potential for improved signal routing density and reduced PCB area. Because of these improvements there is the potential for PCB cost reduction as well as gains in electrical performance through reduced impedance and inductance. However, not long after the implementation, double digit unit failures for solder joint electrical opens due to capacitor “tombstoning” began to occur. Failure modes included via fill material (solder mask) protrusion from the via as well as “out gassing” and related “tombstoning.” This failure analysis involved investigating a strong dependence on PCB supplier and, less obviously, manufacturing site. Other factors evaluated included via fill material, drill size, via fill thermal history and via fill amount or fill percent. The factor most implicated was incomplete cure of the via fill material. Previous thermal gravimetric analysis methods to determine level of polymerization or cure did not provide an ability to measure and demonstrate via fill cure level in small selected areas or its link to the failures. As a result, there was a metrology approach developed to establish this link and root-cause the failures in the field, which was based on microhardness techniques and noncontact via fill measuring metrologies.

The Aviation and Missile Command requested the US Army Research Laboratory to perform a metallurgical examination of a main rotor sub-assembly from an attack helicopter as vibration was noticed during a test flight after replacement of the main rotor head. This article presents the details of the metallurgical examination, the mechanical properties of and chemical analysis on the failed component, and the techniques adopted for the examination such as scanning electron microscopy, X-ray mapping, energy dispersive spectroscopy, and residual stress analysis. The discussion includes the details of crack origin, fatigue progression, and the circumstances which caused the point contact between a MP35N pin and a PH 13-8 Mo component. The failure of the main rotor strap pack outboard pitch cone bolt was attributable to galling. Several of the cracks may have propagated by fatigue and converged beneath the bolt inner diameter or adhesive wear may have induced a sub-surface crack origin.

This article deals with an investigation to determine the root cause of the differences noted in the fatigue test data of main rotor spindle assembly retaining rods fabricated from three different materials. The US Army Research Laboratory - Materials Directorate (ARL) subjected the failed tie rods to visual examination and light optical microscopy and then performed dimensional verification and measured the respective surface roughness of the rods in an effort to identify any discrepancies. Next, mechanical testing (hardness, fatigue, and tensile) was performed, followed by metallography, and chemical analysis. Finally, the ARL performed laboratory heat treatments at the required aging temperature. The results suggested that the difference in performance could not be directly linked to chemical composition, dimensional intolerance, surface roughness or any metallographic variance and that the likely explanation for the difference observed in the mechanical performance of materials lies within a variation of the heat treatment.

The present work investigated the use of the Vickers micro-hardness test method to determine the resistance of individual die to cracking. The results are used as an indicator of resistance to failure under the thermal and mechanical stresses of packaging and subsequent thermal cycling. Indentation measurements on die back surfaces are used to determine how changes in wafer backside processing conditions affect cracks that form around impressions produced at different loads. Test methodology and results obtained at different processing conditions are discussed.