This paper presents a root cause analysis case study of defective Hall-effect sensor devices. The study identified a complex failure mode caused by chip-package interaction, which has a similar signature to discharging defects such as ESDFOS. However, the study revealed that the defect was induced by local mechanical force applied to IC structures due to the presence of large irregular-shaped filler particles within the mold compound. Extensive failure analysis work was conducted to identify the failure mode, including the development of a new backside analysis strategy to preserve the mold compound during IC defect localization and screening. A combination of different failure analysis techniques was used, including CMP delayering, PFIB trenching, SEM PVC imaging, and large area FIB cross-sectioning. The study found that the mold compound of the package caused thermos-mechanical strain onto the silica filler particle due to epoxy shrinkage during the molding process. Additionally, extra-large, irregularly shaped filler particles (called twin particles), located on top of the chip surface, can cause locally high compression stresses onto the IC layers, initiating cracks in the isolation layers under certain conditions forming a leakage path over the time. Thermo-mechanical finite element analysis was applied to verify the mechanical load condition for these large irregular-shaped filler particles. As a result, an additional polyimide layer was introduced onto the IC to mitigate the mechanical stress of mold compound particles to avoid this failure mode.

Fault Injection Attacks (FIAs) have become prolific and effective methods of violating the integrity and confidentiality of integrated circuits and electronic systems. FIAs can be accomplished using clock-glitch, voltage glitch, laser, optical instruments, and electromagnetic (EM) emanation. One promising solution to detect FIAs is to use on-chip sensors to capture the attacks’ impact. However, the variety of FIAs has led to numerous custom-designed sensors for each of them, challenging the feasibility of the implementation and introducing a large overhead. This paper proposes developing a universal Fault-to-Time Converter (FTC) sensor that can effectively detect all the aforementioned FIAs while requiring minimal overhead. The FTC sensor converts the effects of faults injected by an FIA method into “time” that is measurable. Then, the “time” difference can be analyzed further to identify whether an attack has been carried out successfully. The sensor design can be easily implemented in both FPGA and ASIC platforms. Our FTC sensor implementation in FPGA platforms demonstrates that the design can effectively differentiate various FIA attack scenarios with its encoded output. The FTC sensor can also be extended to cover other fault attacks that have a similar impact on the victim device (i.e., affecting circuit timing).

We describe the use of magnetic tunnel junction (MTJ) sensors for the purposes of magnetic current imaging. First, a case study shows how magnetic and current density images generated using an MTJ sensor probe were used to isolate the root cause of failure in a newly-designed ASIC. We then give a brief introduction to the operation and construction of MTJ sensors. Finally, a full comparison is made between the three types of sensors which have been used for magnetic current imaging: giant magnetoresistive (GMR) sensors, superconducting quantum interference devices (SQUIDs), and magnetic tunnel junctions. These three technologies are quantitatively compared on the basis of spatial resolution, sensitivity, and geometry.

SQUID and MR magnetic sensors have separately been used for fault isolation of shorts and resistive opens in integrated circuits and packages. These two technologies were once considered to be mutually exclusive, although recent studies [1] rather pointed to their complementary character. This paper shows, for the first time, the use of these two sensors together to isolate a low resistance short in a Quad-NAND gate microcircuit. Electrical test confirmed low resistance shorts between three of the device pins. However, internal optical inspection found no evidence of failure. The low resistance of the shorts was deemed insufficient for liquid crystal analysis. Magnetic current imaging with a SQUID sensor confirmed current flow through the package lead frame and isolated the defect to the microcircuit. Due to package design and the resulting distance of the scan plane, the SQUID was unable to resolve the current path on the microcircuit. In parallel with the SQUID, a magnetoresistive (MR) probe was employed to fit inside the device cavity, make direct contact with the microcircuit, and map high-resolution current images. Two sites with high-current density were accurately identified by MCI in input transistors. Subsequent deprocessing revealed that the defects were located under a broad sheet of aluminum metallization which blocked optical detection, and rendered detection by thermal emission difficult.

The unique physical phenomenon of photon emission from a variety of defects in ICs has long been exploited for failure analysis. This method provides a fast non-destructive inspection method for failure localization. Several functional failures have a distinctive emission signature that allows functional analysis of the design. The transition to flipchip packaging accelerated the use of Infrared Focal Plane Arrays (IR FPA) such as MgCdTe (MCT). It has been proven that systems that incorporate MCT arrays demonstrate higher sensitivity for emissions in comparison to the traditional Si CCDs; usually the higher sensitivity is compromised with inferior resolution. In this work we will review and demonstrate the optical limitations involved with the use of an MCT camera, yet we shall show a calibration procedure carried out by the analyst to bypass these limitations. By calibrating typical emissions, generated by typical functional defects, we generate calibration curves, which supply a fast reference for detection of the defective transistor, and the correlated current that results from the defect. The calibration of the array response is crucial for evaluation of its sensitivity. It will also enable a clear distinction between emissions, which correlate to small or negligible current flows, and emissions that correlate to significant current flows. We also classify logic failures that lead to emissions, and estimate the level of emission anticipated from these failures.

Infrared Micro Thermography can be applied as electrical fault identification in situations where photon emission is ineffective. Defects, such as certain types of stringers and particles, may conduct without emitting photons in the visible range. Arrayed infrared sensors such as an InSb 512x512 detector, coupled with the appropriate infrared optics can image the heat generated from the leakage site. Heating on the order of a fraction of a degree Kelvin can be observed. The heat signature can be superimposed on a normal optical image of the chip. Several practical examples using this fault identification technique are described.