Protection layers on double ex situ lift-out TEM specimens were investigate in this paper and two protection layer approaches for double INLO or double EXLO were introduced. The improved protection methods greatly decreased the damage layer on the top surface from 90 nm to 5 nm (or lower) during FIB milling. According to the property of different sample and its preliminary treatment in the FIB, we have the satisfactory approaches to be applied. Using this improved protection method, we demonstrate the structures within the TEM lamella can be observed without ion beam damage/implantation during FIB

Multipurpose sample holder for advanced Transmission Electron Microscopy (TEM) sample preparation which reduces cost of the tool and most importantly simplifies the workflow is introduced. Following the current demand for user-friendly interface, semi-automated approach is aimed to be build up. Abilities to prepare advanced TEM lamellae in various geometries without rotary nanomanipulator and using various end-point detection signals are perceived as biggest advantages of this design.

As the new generation of microelectronics is pushed into smaller spaces and the yield production is pushing to lower the unoccupied spaces on chips, the local variation of stress has an influence on the component’s performance. This stress comes mainly from different thermal and mechanical properties of the materials used especially in 3D integrations like through silicon via (TSV) technology [1]. Through finite element simulation [2] the internal strain profile was modelled and based on these findings we devised a simulation model for a large area chunk lift out, to preserve the stress inside the material. Standard preparation method for strain measurement is to use a wafer dicing saw and subsequently focused ion beam (FIB) milling, to create lamellae with a defined geometry, close to the desired TSV. This method requires different equipment and knowledge base to achieve a lamella which is still contaminated by Gallium. Therefor we developed our own method based on an FE model of a large chunk lift out, where only a Xenon Plasma FIB is utilized until the local stress measurement using convergent beam electron diffraction (CBED) is measured in a transmission electron microscope (TEM).

The development of vertical 3D NAND technology over the past 5 years has been accelerated by the parallel development of metrology techniques capable of characterizing these device stacks. Current trends point toward a continuous scaling of dimensions along the z-axis, involving a critical etch step with aspect ratios of ~50:1. These high aspect ratio process steps present both fabrication and metrology challenges where the channel holes can bend, bow, and pinch off throughout the stack. Work presented herein demonstrates the capability of an automated workflow developed using the Thermo Scientific™ Helios™ G4 HXe DualBeam™ platform. The workflow iteratively exposes desired layers within the NAND stack, collects high resolution SEM images, and performs metrology to enable statistical analysis of trends as a function of depth within the stack. Results will be presented from 3 sites in an automatically delayered 72-layer 3D NAND die. Automated SEM metrology was performed every 10 layers, capturing more than 6000 devices. Over 19000 measurements were made on imaged devices yielding assessment of statistically significant trends in the planar cell area, eccentricity, and position of the bits as a function of depth.

On mechanically polished cross-sections, getting a surface adequate for high-resolution imaging is sometimes beyond the analyst’s ability, due to material smearing, chipping, polishing media chemical attack, etc.. A method has been developed to enable the focused ion beam (FIB) to re-face the section block and achieve a surface that can be imaged at high resolution in the scanning electron microscope (SEM).

Practice and training samples have been manufactured using 3D-printing methods. These 3D-printed samples mimic the exact geometry of focused ion beam (FIB) prepared specimens and can be used to help master ex situ and in situ lift out micromanipulation methods. An additively manufactured array of samples yields numerous samples needed for repetition and deliberate practice necessary to master the lift out and micromanipulation steps. The 3D-printed samples are cost effective and negates expensive FIB time needed to prepare FIB specimens.

Low energy (i.e., 5 keV, 3 keV) Xe+ plasma FIB methods were applied to Si ex situ lift out specimens. Cs-corrected STEM imaging reveals the Si dumbbell structure indicating excellent surface quality achieved during the low energy polishing steps.

This paper demonstrates a methodology for chip level defect localization that allows complex logic nets to be approached from multiple perspectives during failure analysis of modern flip-chip CMOS IC devices. By combining chip backside deprocessing with site-specific plasma Focused Ion Beam (pFIB) low angle milling, the area of interest in a failure IC device is made accessible from any direction for nanoprobing and Electron Beam Absorbed Current (EBAC) analysis. This methodology allows subtle defects to be more accurately localized and analyzed for thorough root-cause understanding.

Deprocessing and probing are two quintessential steps in the physical failure analysis (PFA) and competitive analysis of integrated circuits (ICs). Typically, these steps are accomplished using multiple tools, which include polishers, electron microscopes, and probers. To combat the aggressive back-end-of-line (BEOL) scaling which has significantly decreased the controllability of manual polishing, gas-assisted Xe plasma FIB has been employed to achieve large area uniform delayering. Combined with an in-situ probing capability within the plasma FIB, the iterative process of juggling between tools is streamlined into a seamless process. In this paper, the successful integration of Prober Shuttle and plasma FIB to isolate and visualize real defects on sub-20 nm microprocessor chips are presented.

Transmission electron microscopy (TEM) sample can be routinely made at a sub 30nm thickness and specific features in semiconductor device design are on the order of 30nm and smaller. As a result, small changes in pattern match registration can significantly influence the success or failure of proper TEM sample placement as an approximately 15nm shift in lamella placement can easily cause the sample to be off the feature of interest. To address this issue, design based recipe writing is being developed on a dual beam focused ion beam platform. The intent is to have the tool read a GDS file and pattern match the design information to physical wafer images in a similar fashion to state-of-the-art critical dimension scanning electron microscopy operation. While the results are very encouraging, more work needs to be done to ensure a TEM sample of approximately 30nm thickness is placed at the desired location.

Transmission electron microscopy (TEM) specimens are typically prepared using the focused ion beam (FIB) due to its site specificity, and fast and accurate thinning capabilities. However, TEM and high-resolution TEM (HRTEM) analysis may be limited due to the resulting FIB-induced artifacts. This work identifies FIB artifacts and presents the use of argon ion milling for the removal of FIB-induced damage for reproducible TEM specimen preparation of current and future fin field effect transistor (FinFET) technologies. Subsequently, high-quality and electron-transparent TEM specimens of less than 20 nm are obtained.

The Dual Focused Ion Beam (DFIB has been used to expose electrical fields associated with the charge of electrically active extended defects (ED) – (e.g. threading dislocations - TDs) in GaN structures. The localized electrical fields above electrically active defects in piezoelectric materials are shown to capture sputtered low energy ions, turning them back toward the surface and redepositing them on top of defects (TDs), forming Gallium-rich islands. This “Ga droplet” decorates EDs and significantly simplifies the process of locating EDs for TEM sample preparation and analyses. The size and shape of the Ga islands is correlated with the accumulated piezoelectric charge density at the EDs.

Vacuum assisted ex situ lift out may be used for fast, easy, and reproducible plan view specimen preparation. Manipulation of samples via beveled hollow glass probes whose plane of interest is parallel to slotted grids allow for conventional FIB milling for S/TEM analysis.