The electrical and chemical properties of insulators produced by codeposition of siloxane compounds or TEOS with oxygen in a focused ion beam (FIB) system were investigated. Metal-insulator-metal capacitor structures were fabricated and tested. Specifically, leakage current and breakdown voltage were measured and used to calculate the effective resistance and breakdown field. Capacitance measurements were performed on a subset of the structures. It was found that the siloxanebased FIB-insulators had superior electrical properties to those based on TEOS. Microbeam Rutherford backscattering spectrometry analysis and Fourier transform infrared spectroscopy were used to characterize the films and to help understand the differences in electrical behavior as a function of gas chemistry and deposition conditions. Finally, a comparison is made between the results presented here, previous results for FIB-deposited insulators, and typical thermally-grown gate oxides and interlevel dielectric Si02 insulators.

This paper explains how laser assisted deposition used in combination with focused ion beam (FIB) milling reduces turnaround time for complex circuit modifications. It presents the results of three case studies, characterizing the process and the effect of various processing parameters. The first case involves the creation of a low resistance path between internal signal lines using only laser techniques; the second case demonstrates the use of laser deposition to route interconnects, millimeters in length, between two complex FIB modifications; and the third case is designed to reproduce a charge build-up problem. The paper also discusses the use of gold as a deposition material.

The specimen preparation technique using focused ion beam (FIB) to generate cross-sectional transmission electron microscopy (XTEM) samples of chemical vapor deposition (CVD) of Tungsten-plug (W-plug) and Tungsten Silicides (WSi x ) was studied. Using the combination method including two axes tilting[l], gas enhanced focused ion beam milling[2] and sacrificial metal coating on both sides of electron transmission membrane[3], it was possible to prepare a sample with minimal thickness (less than 1000 A) to get high spatial resolution in TEM observation. Based on this novel thinning technique, some applications such as XTEM observation of W-plug with different aspect ratio (I - 6), and the grain structure of CVD W-plug and CVD WSi x were done. Also the problems and artifacts of XTEM sample preparation of high Z-factor material such as CVD W-plug and CVD WSi x were given and the ways to avoid or minimize them were suggested.

Locating fault origins of defective logic LSls requires expensive equipment, such as electron beam testers and LSI testers. In order to maximize the utilization of such equipment in achieving high fault analysis throughput as well as to save manpower, the authors are developing an automatic fault tracing system which locates the fault origin overnight without human assistance through control of an electron beam tester and an LSI tester. The system traces backwards via the fault propagation path and locates the fault origin by comparing the behavior of a faulty LSI sample with that of a good LSI sample. Sample exchange in a vacuum chamber is achieved through a dual chip loading mechanism. After initial setting, fault location is accomplished without human assistance by fully automated operations, such as fine tuning SEM images of LSI surfaces, aligning points by robust pattern matching between SEM images and layout data, acquiring voltage contrast images with high contrasts and judging logical voltage levels from the images. A prototype version of this system successfully backtraced to the fault origin of an LSI with 20 k gates in 8 hours.