Advancements in microelectronics necessitate novel failure analysis techniques sensitive to the specific failure physics. Thermo-mechanical failure is a well-known issue in heterogeneously integrated microelectronics, which often requires destructive failure analysis to identify. Here, we demonstrate thermo-mechanical heat response (T-MeHR) as a non-destructive failure analysis method which combines pump-probe thermoreflectance with optical interferometry. In particular, we are able to map subsurface defects in a silicon-silicon direct bonded system and find that the simultaneously acquired thermal and mechanical signals provide complementary profiles dictated by the defect severity and size.

Time-resolved emission microscopy (TREM) enables non-intrusive failure analysis of integrated circuits through photoemission detection at picosecond resolution. While photoemission occurs in both functional and faulty ICs, certain emission patterns distinctively indicate device defects. The primary mechanism driving this phenomenon is hot carrier luminescence in silicon, where carriers with excess kinetic energy release photons through intraband transitions. In CMOS logic, these emissions occur when MOSFETs switch between logical states, generating drain-to-source current flow. However, modern large-scale ICs present unique challenges for photoemission analysis: their lower operating voltages and reduced switching currents result in fewer photon emissions, predominantly in the infrared spectrum. We address these limitations by implementing superconducting-nanowire single-photon detectors (SNSPDs), enabling high-sensitivity photoemission microscopy for advanced IC failure analysis.

As System-on-a-Chip (SoC) continues to increase in complexity, multiple functionalities are being integrated into one integrated circuit (IC). This requires optimization of Design-for-Testability (DFT) strategies to minimize test time while still ensuring full test coverage of the entire chip. It has led to the widespread adoption of Tessent Streaming Scan Network (SSN) architecture on advanced technology nodes. Unlike traditional scan architectures that send data directly to the scan chains, SSN breaks down the data into packets and optimizes the delivery of these packets to allow efficient, concurrent testing of any number of cores. However, SSN presents a challenge for failure analysis, as it becomes extremely difficult to directly modify the SSN patterns on the fly to create a stimulus that will be used for many of the electrical fault isolation (EFI) techniques such as Laser Voltage Imaging (LVI) and Probing (LVP), Dynamic Laser Stimulation (DLS) and Photon Emissions Analysis (PEM). Key challenges include the inability to loop test patterns, run periodic sequences and no visibility of the scan control and clock signals, since these signals are internally generated by the SSH during retargeting. This paper introduces a new Tessent DFT enhancement developed by Siemens called the “LVX mode”. It is the first feature designed to enable Failure Analysis within a DFT tool, utilizing specific DFT hardware for implementation. In addition, another DFT feature which enables writing special pattern annotations that will indicate the start and end of a capture window and the location of all the capture pulses within that window for a particular pattern will also be presented, together with a methodology that will enable static Photon Emissions on SSN patterns. Since on-the-fly modification of the patterns is not possible in SSN, this paper will present two methods that would allow for a more effective and efficient DLS looping. Lastly, the paper will showcase multiple use cases that demonstrate the effectiveness of these identified DFT enhancements for FA.

We demonstrate the effectiveness of combining top-down and cross-sectional electron beam induced current (EBIC) imaging with SEM nanoprobe analysis to identify subtle front-end defects in advanced FinFET technology. Our approach successfully localized a novel fin nanocrack defect that had previously eluded detection through conventional TEM imaging. This systematic resistive pMOS failure, observable only in memory arrays at 150°C, exemplifies the power of EBIC as an alternative to scanning capacitance microscopy for detecting dopant anomalies and subtle defects. The sample preparation and EBIC methodologies presented here are broadly applicable across CMOS technologies, offering a versatile approach to defect analysis.

Non-destructive failure analysis is often limited by the sensitivity or the resolution of the method utilized, making state-of-the-art integrated circuits difficult to analyze. Here, we present a powerful method for surface failure analysis, based on scanning a single Nitrogen Vacancy center over the sample. This results in quantitative current density maps with high sensitivity and sub-30 nm resolution, detecting for example, open and short circuits and visualizing the current flow. We demonstrate the technology by mapping current flow through device structures separated by gaps as low as 30 nm. We further show how resolution is reduced as a capping layer is added, by measuring at a fixed offset of 30 nm from the surface.

Wide-field magnetic imagers using nitrogen-vacancy (NV) centers in diamond yield high-resolution images for various applications, including magnetic field imaging (MFI) of electronics. Despite the ongoing successes of this emerging technique for passively interrogating electronics components (including failure analysis troubleshooting), most of the focus has been on sensing DC and low-frequency currents, due to the technical challenges associated with measuring higher-frequency magnetic fields. Here, we overcome these existing challenges and adapt a recently developed technique for sensing MHz-frequency AC fields, a “quantum frequency mixing” approach. We demonstrate the instrument’s capabilities by imaging the current through a fabricated spiral test structure at various frequencies with a ~1 mm 2 field of view. Finally, we discuss anticipated future applications in electronics interrogation and failure analysis for this imaging technique.

The rise of 2.5D and 3D heterogeneous integrated devices presents unique challenges for failure analysis, as traditional 2D analysis techniques prove inadequate due to chip stacking, layer interconnects, die obscuration, and limited access to test points. While various non-destructive techniques—including 3D X-ray imaging, lock-in thermography, magnetic field imaging, and optical beam methods—offer partial solutions, each has specific limitations. We present a novel defect localization approach using radio frequency electromagnetic (EM) emanations, implemented in two ways: detecting EM signals emitted by the device under controlled input conditions, or measuring induced voltage responses to signals injected via a scanning antenna. The technique employs scanning magnetic or electric field antennas to generate 2D or 3D electromagnetic maps revealing current and electric continuity patterns, enabling detection of shorts (additional current paths) or opens (blocked current paths). By incorporating power spectrum analysis (PSA) at each scan point, our method—designated as EM antenna PSA (EMAPSA) or EM injection PSA (EMIPSA)—provides comprehensive defect detection capabilities for 3D heterogeneous integration failure analysis.

This paper demonstrates that e-beam assisted device alteration (EADA) is a powerful, high-resolution technique for fault isolation debug for advanced technology nodes. A case study using this technique is reviewed and shows successful isolation of a defective single inverter. In addition, fundamental studies of ring oscillator behavior and device perturbations with e-beam exposure found clear correlations for electron beam exposure with NMOS/PMOS device parameters. Electron-hole pair generation in the device with beam exposure is likely the main component for the perturbation, but there may be other contributing factors including charging effects and/or heating.

Laser Voltage Probing (LVP) is an essential Failure Analysis (FA) technique that has been widely adopted by the industry. Waveforms that are collected allow for the analyst to understand various internal failure modes related to timing or abnormal circuit behavior. As technology nodes shrink to the point where multiple transistors reside within the diffraction-limited laser spot size, interpretation of the waveforms can become extremely difficult. In this paper we discuss some of the evolving challenges faced by LVP and propose a new technique known as Differential LVP (dLVP) that can be used to debug marginal failing devices that exhibit a pass/fail boundary in their shmoo plot. We demonstrate how separate pass and fail LVP waveforms can be collected simultaneously and compared to immediately identify whether logic is corrupted and when the corruption occurs. The benefits of this new technique are many. They include guarantees of equivalent pass vs. fail data independent of crosstalk, system noise, stage drift, probe placement, temperature effects, or the diffraction-limited resolution of the probe system. Implementing dLVP into existing tools could extend their effective lifetimes and improve their efficacy related to the demands posed by the debug of 5nm technologies and smaller geometries. We anticipate that fully integrated and evolved dLVP will complement workhorse FA applications such as Laser Assisted Device Alteration (LADA) and Soft Defect Localization (SDL) analysis. Wherein those techniques map timing marginalities propagating to, and observed by, a capture flop, dLVP can extend such capabilities by identifying the first instance of corrupted logic inside the flop and map the corruption all the way to the chip output pin.

Near Infra-Red (NIR) techniques such as Laser Voltage Probing/Imaging (LVP/I), Dynamic Laser Stimulation (DLS), and Photon Emission Microscopy (PEM) are indispensable for Electrical Fault Isolation/Electrical Failure Analysis (EFI/EFA) of silicon Integrated Circuit (IC) devices. However, upcoming IC architectures based on Buried Power Rails (BPR) with Backside Power Delivery (BPD) networks will greatly reduce the usefulness of these techniques due to the presence of NIR-opaque layers that block access to the transistor active layer. Alternative techniques capable of penetrating these opaque layers are therefore of great interest. Recent developments in intense, focused X-ray microbeams for micro X-Ray Fluorescence (μXRF) microscopy open the possibility to using X-rays for targeted and intentional device alteration. In this paper, we will present results from our preliminary investigations into X-ray Device Alteration (XDA) of flip-chip packaged FinFET devices and discuss some implications of our findings for EFI/EFA.

While 2.5D and 3D solutions continue to drive advancements in the electronics packaging industry, challenges persist with their reliability and qualification. In this paper, we introduce a new technique that may prove valuable for nondestructive, in-situ measurements of package and die warpage. This system allows for the powerful visualization tools of Computed Tomography to be applied to samples at elevated and cryogenic temperatures over a broad temperature range (+125C to -257C).

The adoption of 3D packaging technology necessitates the development of new approaches to failure electronic device analysis. To that end, our team is developing a tool called the quantum diamond microscope (QDM) that leverages an ensemble of nitrogen vacancy (NV) centers in diamond, achieving vector magnetic imaging with a wide field-of-view and high spatial resolution under ambient conditions. Here, we present the QDM measurement of 2D current distributions in an 8-nm flip chip IC and 3D current distributions in a multi-layer PCB. Magnetic field emanations from the C4 bumps in the flip chip dominate the QDM measurements, but these prove to be useful for image registration and can be subtracted to resolve adjacent current traces in the die at the micron scale. Vias in 3D ICs display only Bx and By magnetic fields due to their vertical orientation and are difficult to detect with magnetometers that only measure the Bz component (orthogonal to the IC surface). Using the multi-layer PCB, we show that the QDM’s ability to simultaneously measure Bx , By , and Bz is advantageous for resolving magnetic fields from vias as current passes between layers. We also show how spacing between conducting layers is determined by magnetic field images and how it agrees with the design specifications of the PCB. In our initial efforts to provide further z -depth information for current sources in complex 3D circuits, we show how magnetic field images of individual layers can be subtracted from the magnetic field image of the total structure. This allows for isolation of signal layers and can be used to map embedded current paths via solution of the 2D magnetic inverse. In addition, the paper also discusses the use of neural networks to identify 2D current distributions and its potential for analyzing 3D structures.

The emergence of heterogenous integration driven by system-in-package (SiP) technology not only increases the complexity of semiconductor failure analysis, but also makes it more difficult to protect intellectual property because of the growing need to share design information to facilitate fault isolation in assembly and test. One way to address these challenges is through a computer-aided design (CAD) database that can be navigated across multiple components without exposing sensitive information. This paper describes the development and use of such a resource and how it enables safe and secure data sharing among supply chain partners.

In this paper, we discuss the use of spontaneous photon emission microscopy (PEM) for observing filaments formed in HfO 2 resistive random access memory (ReRAM) cells. The setup employs a CCD and an InGaAs camera, revealing photon emissions in both forward ( set ) and reverse ( reset ) bias conditions. Photon emission intensity is modeled using an electric-field equation and inter-filament distance and density are determined assuming a uniform spatial distribution. The paper also discusses the use of high frame rate and prolonged photon emission measurements to assess lifetime and reliability and explains how single filament fluctuations and multiple filaments in a single cell were observed for the first time.

We present a new method for backside integrated circuit (IC) magnetic field imaging using Quantum Diamond Microscope (QDM) nitrogen vacancy magnetometry. We demonstrate the ability to simultaneously image the functional activity of an IC thinned to 12 µm remaining silicon thickness over a wide fieldof- view (3.7 x 3.7 mm 2 ). This 2D magnetic field mapping enables the localization of functional hot-spots on the die and affords the potential to correlate spatially delocalized transient activity during IC operation that is not possible with scanning magnetic point probes. We use Finite Element Analysis (FEA) modeling to determine the impact and magnitude of measurement artifacts that result from the specific chip package type. These computational results enable optimization of the measurements used to take empirical data yielding magnetic field images that are free of package-specific artifacts. We use machine learning to scalably classify the activity of the chip using the QDM images and demonstrate this method for a large data set containing images that are not possible to visually classify.

Getting accurate fault isolation during failure analysis is mandatory for success of Physical Failure Analysis (PFA) in critical applications. Unfortunately, achieving such accuracy is becoming more and more difficult with today’s diagnosis tools and actual process node such as BCD9 and FinFET 7 nm, compromising the success of subsequent PFA done on defective SoCs. Electrical simulation is used to reproduce emission microscopy, in our previous work and, in this paper, we demonstrate the possibility of using fault simulation tools with the results of electrical test and fault isolation techniques to provide diagnosis with accurate candidates for physical analysis. The experimental results of the presented flow, from several cases of application, show the validity of this approach.

Rapid identification of organic contamination in the semi and semi related industry is a major concern for research and manufacturing. Organic contamination can affect a system or subsystem’s performance and cause premature failure of the product. As an example, in February 2019 the Taiwan Semiconductor Manufacturing Company (TMSC), a major semiconductor manufacturer, reported that a photoresist it used included a specific element which was abnormally treated, creating a foreign polymer in the photoresist resulting in an estimated loss of $550M [1].

Currently gaps in non-destructive 2D and 3D imaging in PFA for advanced packages and MEMS exist due to lack of resolution to resolve sub-micron defects and the lack of contrast to image defects within the low Z materials. These low Z defects in advanced packages include sidewall delamination between Si die and underfill, bulk cracks in the underfill, in organic substrates, Redistribution Layer, RDL; Si die cracks; voids within the underfill and in the epoxy. Similarly, failure modes in MEMS are often within low Z materials, such as Si and polymers. Many of these are a result of mechanical shock resulting in cracks in structures, packaging fractures, die adhesion issues or particles movements into critical locations. Most of these categories of defects cannot be detected non-destructively by existing techniques such as C-SAM or microCT (micro x-ray computed tomography) and XRM (X-ray microscope). We describe a novel lab-based X-ray Phase contrast and Dark-field/Scattering Contrast system with the potential to resolve these types of defects. This novel X-ray microscopy has spatial resolution of 0.5 um in absorption contrast and with the added capability of Talbot interferometry to resolve failure issues which are related to defects within organic and low Z components.