There are several variants of artificial intelligence (AI) hardware structures that are under study by the semiconductor industry for potential use in complementary metal–oxide–semiconductor (CMOS) designs. This paper discusses some of the failure analysis challenges that have appeared in discrete test structures and test arrays developed as part of an exploratory phase-change memory (PCM) program at IBM's Albany AI Hardware Research Center.

This paper presents the results of an investigation to gain a better understanding of the impact of wafer substrate copper (Cu) contamination on FinFET devices. A chip from a wafer free of Cu contamination and several chips near a Cu contaminated wafer edge were sampled for chemical, structural, and morphological analysis and electrical device performance testing. The contaminated wafer was also annealed at high temperature, trying to drive Cu diffusion further into the Si substrate. TEM analysis revealed that the Cu interacted with Si to form a stable η-Cu 3 Si intermetallic compound. SIMS analysis from the backside of the wafer detected no Cu even after most of the backside material was removed. Likewise, electrical nanoprobing showed no parametric drift in the FinFETs near the edge of the wafer, comparable to device behavior in a Cu-free Si substrate. These results indicate that the formation of η-Cu 3 Si with a well-defined crystalline structure and stable stoichiometry immobilizes Cu diffusion in the Si substrate. In other words, the impact of Cu diffusion in silicon has no effect on device performance as long as η-Cu 3 Si does not form in the FinFET channel or short any structures within the chip.

This paper provides an overview of the semiconductor analysis process at BMW. It explains how it was developed and how it differs from the failure analysis process used in semiconductor fabs. It describes the general process flow from first analyses through descending levels of localization at different length scales. It discusses sample preparation procedures, test methods and equipment, and advanced techniques. In the work presented here, the authors explain how they combined ToF-SIMS with STEM lamella preparation in a FIB-SEM, which allowed them to correlate concentration variances in an underlying layer with surface anomalies discovered during light microscope inspection.

This paper describes a project to develop and deploy a systematic screening methodology involving computed tomography (CT) to inspect a set of electromagnetic interference (EMI) filter components for a spacecraft application. The goal was to deploy the nondestructive CT test to replace the destructive test method typically deployed for such components. The paper describes the development of test criteria, fixturing, inspection process, and data analysis, including quantitative image analysis of voids and cracks. The initial results indicated that the parts would not pass the requirements established in the test design. A waiver was written to the project clarifying that if the parts were to be used in the assembly, they should be considered as simple conductors with EMI filtering capability viewed as an added benefit rather than a guaranteed design requirement.