The need to increase transistor packing density beyond Moore's Law and the need for expanding functionality, realestate management and faster connections has pushed the industry to develop complex 3D package technology which includes System-in-Package (SiP), wafer-level packaging, through-silicon-vias (TSV), stacked-die and flex packages. These stacks of microchips, metal layers and transistors have caused major challenges for existing Fault Isolation (FI) techniques and require novel non-destructive, true 3D Failure Localization techniques. We describe in this paper innovations in Magnetic Field Imaging for FI that allow current 3D mapping and extraction of geometrical information about current location for non-destructive fault isolation at every chip level in a 3D stack.

In this paper we show an efficient workflow that combines Magnetic Field Imaging (MFI) and Dual Beam Plasma Focused Ion Beam (DB-PFIB) for fast and efficient Fault Isolation and root cause analysis in 2.5/3D devices. The work proves MFI is the best method for Electric Fault Isolation (EFI) of short failures in 2.5/3D Through Silicon Via (TSV) triple stacked devices in a true non-destructive way by imaging the current path. To confirm the failing locations and to do Physical Failure Analysis (PFA), a DB-PFIB system was used for cross sectioning and volume analysis of the TSV structures and high resolution imaging of the identified defects. With a DB-PFIB, the fault is exposed and analyzed without any sample prep artifacts seen in mechanical polishing or laser preparation techniques and done in a considerably shorter amount of time than that required when using a traditional Gallium Focused Ion Beam (FIB).

Interposers used in 2.5D technologies introduce new challenges for Electric Fault Isolation (EFI) due to the multiple layers of silicon, metal layers, Through Silicon Vias (TSV), solder bumps and/or copper pillars making it hard for standard EFI techniques, such as thermal and optical techniques, to localize failures due to the opaqueness of these materials [1, 2, 3]. In this paper we show that shorts in 2.5D Integrated Circuits (IC) technologies can be localized accurately in x, y and z-direction using Magnetic Current Imaging (MCI) while injecting a low power current and showing that the materials used in 2.5D semiconductor manufacturing are fully transparent to magnetic fields.

With the advent of three-dimensional stacked integrated-circuit (3D IC), the functionality, performance and power of semiconductor devices has been elevated to a new level. At the same time, the analytical techniques used in the evaluation of 3D IC must also advance in capability. Some new methodologies, based on FPGA products, have been developed to analyze 3D IC failures, all using conventional FA equipment and innovative techniques to achieve a short turn-around time and high success rate. A few case studies will be presented to show the effectiveness of the methodologies.

Contour milling by high precision CNC-milling offers the possibility to delayer precisely into warped and tilted package interfaces e.g. to expose the die backside. The needed data about the warpage of the surface of interest is in this case derived from SAM time of flight- measurements. The combination of these two approaches solves emerging challenges for backside preparation process.

Lock-in Thermography in combination with spectral phase shift analysis provides a capability for non-destructive 3D localization of resistive defects in packaged and multi stacked die devices. In this paper a novel post processing approach will be presented allowing a significant reduction of measurement time by factor >5 in comparison to the standard measurement routine. The feasibility of the approach is demonstrated on a specific test specimen made from ideal homogenous and opaque material and furthermore on a packaged hall sensor device. Within the case studies the results of multiple single LIT measurements were compared with the new multi harmonics data analysis approach.

Cross sections of large Through Silicon Vias (TSV) and solder bumps are often prepared using the Focused Ion Beam (FIB). The high current Xe plasma ion source allows fast and precise target preparation of TSV with small diameter. Solder bumps can be accessed due to the high milling rate too. However, the high current milling by plasma FIB causes the worsening of the milled surface quality. An optimized FIB scanning strategy accompanied with the novel rocking stage for the sample tilting during the milling has been developed for the plasma FIB. Whole milling process is observed by the Scanning Electron Microscopy (SEM). Time to prepare a cross section is accelerated and the excellent quality is suitable for subsequent failure analysis. Also important is proper sample cleaving before FIB milling. Using an accurate method to cleave the sample prior to FIB preparation further reduces the overall sample preparation time. The high quality cross sections prepared using this new method are ready not only for SEM but also for EDX and EBSD analysis, either 2D or 3D, when combined with FIB slicing. Broadening the analysis to these techniques increases the obtainable information, allowing the arrangement of materials and their crystalline structure to be studied in a detail.

This paper will illustrate the procedures to physically isolate one die in a stacked-die configuration. This highly reliable, systematic method allows for failure analysis engineers of all levels to successfully isolate the die of interest for further investigation.