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Proceedings Papers
ISTFA2012, ISTFA 2012: Conference Proceedings from the 38th International Symposium for Testing and Failure Analysis, 574-577, November 11–15, 2012,
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Abnormal inline defects were caught after nitride spacer etching processes. Detailed MEBES layout checking and inline SEM inspection revealed that such defects always appeared at the boundaries in between PFETs and NFETs regions. The microstructure and chemical composition of the defects were analyzed in detail by various TEM imaging and microanalysis techniques. The results indicated that the defect possessed core-shell structure, with oxide core and nitride shell. Based on the TEM failure analysis results and manufacturing processes, we conclude that the defects originated from PR fencing due to the PR hardening during PFET and NFET LDD/Halo implantation. The oxide core was generated during oxide spacer formation using an ozone-TEOS process, which was responsible for the nitride spacer under-etch issue.
Proceedings Papers
ISTFA2002, ISTFA 2002: Conference Proceedings from the 28th International Symposium for Testing and Failure Analysis, 695-699, November 3–7, 2002,
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In failure analysis of wafer fabrication, currently, three different types of chemical methods including 6:6:1 (Acetic Acid/HNO3/HF), NaOH and Choline are used in removing polysilicon (poly) layer and exposing the gate/tunnel oxide underneath. However, usage is limited due to their disadvantages. For example, 6:6:1 is a relatively fast etchant, but it is difficult to control the etch time and keep the oxide layer intact. Also, while using NaOH to remove poly and expose the silicon oxide, the solution needs to be heated. It is also difficult to etch a poly layer with a WSi x or a CoSi x silicide using NaOH. In this paper, we will discuss these 3 etchants in terms of their advantages and disadvantages. We will then introduce a new poly etchant, called HB91. HB91 is useful for removing poly to expose the gate/tunnel oxide for identification of related defects. HB91 is actually a mixture of two chemicals namely nitric acid (HNO3) and buffer oxide etchant (BOE) in a 9:1 ratio. The experimental results show that it is highly selective in poly removal with respect to the gate/tunnel oxide and is a suitable poly etchant especially for removing polysilicon with/without WSi x and CoSi x in the large capacitor structure. Application results of this poly etchant (HB91) will be presented.
Proceedings Papers
ISTFA2001, ISTFA 2001: Conference Proceedings from the 27th International Symposium for Testing and Failure Analysis, 425-430, November 11–15, 2001,
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In this paper, three low yield case studies in wafer fabrication are reviewed. These issues/problems include thicker gate oxide due to contamination from the wafer fab process, QBD failures due to silicon crystalline defects caused by charging during the BN+ implant process and memory failures relating to tunnel oxide defects in EEPROM devices. Chemical deprocessing techniques, 155 Wright Etch, Scanning Electron Microscope, Transmission electron microscopy & Secondary Ion Mass Spectroscopy were used to identify the root causes. Some new chemical deprocessing techniques in exposing the tunnel window & oxide for the memory cell failures were developed. Moreover, some new failure mechanisms relating to the low yield due to thicker gate oxide, silicon crystalline defects and QBD failure were also discussed.