This paper presents a novel deductive methodology, which is accomplished by applying difference analysis to nano-probing technique. In order to prove the novel methodology, the specimens with 90nm process and soft failures were chosen for the experiment. The objective is to overcome the difficulty in detecting non-visual, erratic, and complex failure modes. And the original idea of this deductive method is based on the complete measurement of electrical characteristic by nano-probing and difference analysis. The capability to distinguish erratic and invisible defect was proven, even when the compound and complicated failure mode resulted in a puzzling characteristic.

Shallow junction formation in silicon chips is a hot topic in the semiconductor industry. Reduction of power consumption of integrated circuits and an increase of the device performance would drastically reduce the sizes of circuits and, therefore, would necessitate a similar reduction for the depth of the p-n junctions. This paper performed the flash lamp annealing process application, applied to the CMOS as alternative method to attain the goal of shallow junction in the case. A marginal thermal budget mismatch related failure mode was revealed and explained.