Planar deprocessing is a vital failure analysis technique for semiconductor devices. The basic concept is to expose an area of interest (AOI) by removing unnecessary material while maintaining planarity and surface evenness. Finger deprocessing is a widely used material removal technique, particularly for fin field-effect transistors (FinFETs). Here, success depends on certain factors, one of which is the location of the AOI. If the AOI is near the edge of the chip, finger deprocessing can be very difficult because material removal rates are much higher there than at the center of the chip. Plasma focused ion beam (PFIB) planar deprocessing is the preferred solution in such cases, but many labs cannot afford a PFIB system. To address this challenge, a sample preparation method has been developed that uses dummy chips to effectively eliminate edges. With dummy chips placed edge-to-edge with test chips, planar deprocessing can be achieved using conventional finger deprocessing techniques. This paper describes the newly developed method, step by step, and presents two examples demonstrating its use.

This paper explains how tunneling atomic force microscopy (AFM) was used to determine the cause of leakage in FinFETs along the boundary of SRAM cells. The leaking devices were electrically isolated using photoemission microscopy, but conventional FA techniques, including SEM and TEM imaging, found no structural abnormalities. Suspecting that the failures may be due to dopant-related issues, the authors obtained cross sections of both good and bad devices and scanned them in a tunneling AFM. The paper describes the sample preparation process and includes cross-sectional images showing the difference between good and bad transistors. In SRAM areas where no leakage occurred, the fins are well defined and evenly spaced. However, in the area where an emission spot was observed, two of the fins appear to be overlapping, the result of n-well implants that merged.