Abstract As the new generation of microelectronics is pushed into smaller spaces and the yield production is pushing to lower the unoccupied spaces on chips, the local variation of stress has an influence on the component’s performance. This stress comes mainly from different thermal and mechanical properties of the materials used especially in 3D integrations like through silicon via (TSV) technology [1]. Through finite element simulation [2] the internal strain profile was modelled and based on these findings we devised a simulation model for a large area chunk lift out, to preserve the stress inside the material. Standard preparation method for strain measurement is to use a wafer dicing saw and subsequently focused ion beam (FIB) milling, to create lamellae with a defined geometry, close to the desired TSV. This method requires different equipment and knowledge base to achieve a lamella which is still contaminated by Gallium. Therefor we developed our own method based on an FE model of a large chunk lift out, where only a Xenon Plasma FIB is utilized until the local stress measurement using convergent beam electron diffraction (CBED) is measured in a transmission electron microscope (TEM).

Abstract In the vicinity of a through silicon via (TSV) used in 3D chip integration, the effect of dedicated strain engineering to enhance the carrier mobility in the channel of metal oxide semiconductor field effect transistors (MOSFETs) is superposed by a strain caused by cooling down from high process temperatures to room temperature. This additional strain influences the transistor characteristics, and consequently the product performance. The measurement of strain with high spatial resolution requires TEM-based methods. In this paper, convergent beam electron diffraction (CBED) is used for strain measurement. The strain state is significantly changed during the preparation of the TEM lamellae. The exact sample geometry and accurate materials parameters were used in FE modelling and strain simulation based on a physical model. The strain in silicon at several distances from the TSV were determined experimentally using TEM-CBED and compared with numerical simulations. High-quality sample preparation is crucial for reliable and reproducible TEM-based strain data, i.e., it is a necessary precondition for strain release correction based on FE modelling and simulation.