In this paper, we present application of the SDL technique towards full root cause analysis of functional and structural failures from BIST, SCAN etc. on AMD’s advanced Silicon-on-Insulator (SOI) microprocessors based on a 90 nm process technology node. The devices were exercised at speed using production testers. SDL is used on these microprocessors with failure modes which pass at a lower temperature/voltage but fail at higher temperature/voltage or vice versa to isolate the failing logic/node. The SDL sites are examined for a full root cause analysis and possible process improvements.

Thermal beam induced techniques such as Thermally Induced Voltage Alteration (TIVA), Seebeck Effect Imaging (SEI) [1] and Optical Beam Induced Resistance Change (OBIRCH) [2] have been used for localization of reliability related faults in integrated circuits over the last few years. In this paper, we describe several approaches to optimize the detection of thermal beam induced phenomenon. In the first method, we have improved control of the laser scanning system to define a specific dwell time at each pixel. Secondly, we utilized a voltage source in series with an inductor to detect the induced voltage changes as the laser is scanned across the device. Finally, we employed a pulsed laser and a lock-in signal processing technique to increase the signal-tonoise ratio.

The Single Contact Optical Beam Induced Currents (SCOBIC) is a new failure analysis technique, which allows the imaging of junctions by a single connection to the substrate or power pin of an integrated circuit. Modern packaging technologies and multi-layer metallizations has increased the need for backside IC failure analysis. In this paper, the SCOBIC technique is used to image junctions from the die backside. The implementation of backside SCOBIC system is discussed. Application of the SCOBIC technique from both the frontside and backside of CMOS and NMOS devices are presented.

Light emission and heat generation of Si devices have become important in understanding physical phenomena in device degradation and breakdown mechanisms. This paper correlates the photon emission with the temperature distribution of a short channel nMOSFET. Investigations have been carried out to localize and characterize the hot spots using a spectroscopic photon emission microscope and a scanning thermal microscope. Frontside investigations have been carried out and are compared and discussed with backside investigations. A method has been developed to register the backside thermal image with the backside illuminated image.