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M Tanjidur Rahman
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Proceedings Papers
ISTFA2018, ISTFA 2018: Conference Proceedings from the 44th International Symposium for Testing and Failure Analysis, 256-265, October 28–November 1, 2018,
Abstract
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Abstract Hardware Trojans are malicious changes to the design of integrated circuits (ICs) at different stages of the design and fabrication processes. Different approaches have been developed to detect Trojans namely non-destructive (electrical tests like run-time monitoring, functional and structural tests) and destructive (full chip reverse engineering). However, these methods cannot detect all types of Trojans and they suffer from a number of disadvantages such as slow speed of detection and lack of confidence in detecting all types of Trojans. Majority of hardware Trojans implemented in an IC will leave a footprint at the doping (active) layer. In this paper, we introduce a new version of our previously developed “Trojan Scanner” [1] framework for the untrusted foundry threat model, where a trusted GDSII layout (golden layout) is available. Advanced computer vision algorithms in combination with the supervised machine-learning model are used to classify different features of the golden layout and SEM images from an IC under authentication, as a unique descriptor for each type of gates. These descriptors are compared with each other to detect any subtle changes on the active region, which can raise the flag for the existence of a potential hardware Trojan. The descriptors can differentiate variation due to fabrication process, defects, and common SEM image distortions to rule out the possibility of false detection. Our results demonstrate that Trojan Scanner is more reliable than electrical testing and faster than full chip reverse engineering. Trojan Scanner does not rely on the functionality of the circuit rather focuses on the real physical structure to detect malicious changes inserted by the untrusted foundry.
Proceedings Papers
ISTFA2018, ISTFA 2018: Conference Proceedings from the 44th International Symposium for Testing and Failure Analysis, 290-294, October 28–November 1, 2018,
Abstract
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Abstract In the last decades, the supply chain of printed circuit boards (PCBs) becomes distributed with growing complexity of PCB designs and the economic trend of outsourcing the PCB manufacturing. This makes the PCBs more vulnerable to security attacks, such as tampering, snooping, and electromagnetic (EM) attacks. Because of the large feature size of PCBs (compared to integrated circuits), it is challenging to protect the PCBs from those attacks or proof the suspected attacks. For the same reason, PCBs are vulnerable to non-invasive reverse engineering by X-ray tomography as well. In this paper, we propose a novel silicon carbide (SiC) coating technique to provide passive protection for PCBs from in-field tampering, snooping and EM attacks. In addition, capacitive sensors are designed based on the SiC coating, offering active defense against those attacks. The coating and sensors can be implemented on PCBs in cost-efficient ways and the area overheads are minimized. The insulating coating also allows an extra tungsten-based painting to be applied to prevent the X-ray reverse engineering.