Abstract This article describes how 3D Real Time X-Ray (RTX) technique enhances the capability of package-level failure analysis of a flip-chip package. 3D RTX was successful in detecting different failure signatures. This paper outlines detailed applications of 3D RTX with case studies.

Abstract Mechanical thinning of Si die backside was introduced to support fault isolation for flip chip package in this paper. The backside milling system provides two types of thinning with good die planarity and mirror polishing to yield a high image quality for fault isolation techniques such as laser base thermal emission and photon emission techniques. In this paper, two mechanical thinning techniques were applied by using the 3D die curvature thinning and 2D planar thinning on flip chip Si backside. The impact of process parameters on die planarity and fault isolation were also discussed. The experimental results demonstrate the milling system’s high uniformity across the large die size and provide a very good solution for fault isolation techniques.

Abstract Electro-optical terahertz pulse reflectometry (EOTPR) was introduced last year to isolate faults in advanced IC packages. The EOTPR system provides 10μm accuracy that can be used to non-destructively localize a package-level failure. In this paper, an EOTPR system is used for non-destructive fault isolation and identification for both 2D and 2.5D with TSV structure of flip-chip packages. The experimental results demonstrate higher accuracy of the EOTPR system in determining the distance to defect compared to the traditional time-domain reflectometry (TDR) systems.

Abstract This paper describes the application of lock-in thermography (LIT) for flip-chip package-level failure analysis. LIT successfully detected and localized short failures related to both die/C4 bumps and package defects inside the organic substrate. The detail sample preparation to create short defects at different layers, LIT fault isolation methodology, and case studies performed with LIT are also presented in this paper.

Abstract This article describes how Focused Ion Beam (FIB) milling methodology enhances the capability of package-level failure analysis on flip-chip packages by eliminating the artifacts induced by using conventional mechanical techniques. Dual- Beam Focused Ion Beam (DB FIB) cross sections were successful in detecting failure mechanisms related either to the die/C4 bump or package defect inside the organic substrate. This paper outlines detailed sample preparation techniques prior to performing the DB FIB cross-sections, along with case studies of DB FIB cross-sections.