In the NAND flash manufacturing process, thousands of internal electronic fuses (eFuse) are tuned in order to optimize performance and validity. In this paper, we propose a machine learning optimization technique that uses deep learning (DL) and genetic algorithms (GA) to automatically tune eFuse values. Using state-of-the-art triple-level cell (TLC) V-NAND flash wafers, we trained our model and validated its effectiveness. Based on the findings of the evaluation and production data, the proposed optimization technique can reduce total turnaround time (TAT) by 70% compared with manual eFuse tuning.

This paper presents a novel approach for detecting channel hole bending (ChB) defects in vertical NAND flash memory. Such defects are the result of etching process inconsistencies and contribute to data loss and device failure by inducing leakage current between adjacent channel holes. In order to satisfy long-term reliability requirements and volume demand, chipmakers must be able to detect these defects prior to shipping during electrical die sorting and screening procedures. The proposed method works by monitoring leakage current differences between diagonally and horizontally adjacent memory cells and is shown to be an effective screening technique.

We have adopted various defect detection systems in the front stage of manufacturing in order to effectively manage the quality of flash memory products. In this paper, we propose an intelligent pattern recognition methodology which enables us to discriminate abnormal wafer automatically in the course of NAND flash memory manufacturing. Our proposed technique consists of the two steps: pre-processing and hybrid clustering. The pre-processing step based on process primitives efficiently eliminates noisy data. Then, the hybrid clustering step dramatically reduces the total amount of computing, which makes our technique practical for the mass production of NAND flash memory.