This paper placed a strong emphasis on the importance of applying Systematic Problem Solving approach, deep dive and use of right/appropriate FA approach/tools that are essentially critical to FA analysts to understand the “real” root cause. A case of low yield with polar failing pattern was seen and matched well with the Al Pad etch E chuck configuration. Customer also reported of passivation crack issue at the solder bumps. All these evidences suggested the root cause was related to wafer fabrication issue. However, it was through a strong “inquisitive” mindset coupled with the essence of such strong problem solving approach that led to uncover the actual root cause. Although customer test condition was not able to be duplicated due to limited information available in foundry industry, a four point probing alternative method was engaged to overcome this limitation. Unlike typical case, the AlOx thickness was comparable for bad and good dies. Further in depth analysis subsequently revealed the higher O content in the AlOx for the bad dies that was the real culprit for the higher bump resistance. This paper highlights the job of FA analyst is not simply finding defect but also plays a catalyst role in root cause/failure mechanism understanding by providing supporting FA evidence (electrically / physically) to Fab. It would serve as a good reference to wafer Fab that encountered such issue.

Contamination in the gate oxide layer is the most common effect which cause the gate oxide integrate (GOI) issue. Dynamic Secondary Ion Mass Spectrometry (SIMS) is a mature tool for GOI contamination analysis. During the sample preparation, all metal and IDL layers above poly should be removed because the presence of these layers added complexity for the subsequent SIMS analysis. The normal delayering process is simply carried out by soaking the sample in the HF solution. However, the poly surface is inevitably contaminated by surroundings even though it is already a practice to clean with DI rinse and tape. In this article, TOFSIMS with low energy sputter gun is used to clean the sample surface after the normal delayering process. The residue signals also can be monitored by TOF SIMS during sputtering to confirm the cross contamination is cleared. After that, a much lower background desirable by dynamic SIMS. Thus an accurate depth profile in gate oxide layer can be achieved without the interference from surface.

This paper described a gate oxide failure case which affected the electrical parameters such as Vt and Idsat of both HV N&P MOS. A systematic problem solving approach combined with several FA techniques was applied to find the root-cause to be arsenic outgas cross-contamination.

Threshold Voltage (Vt) of MOSFET controls transistor’s on and off state. Vt is usually depends on gate oxide thickness and operating temperature. Systematic failure analysis for a Vt shift issue, should also consider the channel doping which affects the inversion layer formation. In this article, the failure case of a shift in the Vt of a Power MOSFET V is studied. Secondary Ion Mass Spectrometry (SIMS) is found to be the most direct way for detecting any abnormality in the channel doping profiles. A comprehensive simulation is performed showing that the Phosphorus level diffusion from substrate was so high that it affects the doping concentration of channel.