Abstract
This paper describes the detailed sample preparation of direct Cu-to-Cu bonding in 3D packaging between processor and memory. Different sample preparation techniques are described and compared. The sample preparation methods will then be confirmed by advanced structural characterization and strain measurement. The presence of voids and strain at the bonding interface is associated with the development of device failure.
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2024
ASM International
Issue Section:
System in Package and 3D Devices
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