Laser Voltage Characterization of Transition Delay Failures in Combinatorial Logic

Laser voltage imaging techniques are widely used in failure analysis for detecting defects in digital circuitry. In case of scan chain failures that are substantially static, this is really the most suitable application. In this paper we explore and demonstrate the potential of this method for characterizing transition delay failures in combinatorial logic, through the real-time measurement of the behaviour of each transistor in the cell.