This paper presents a die-level sample preparation technique that uses selective etch chemistry and laser interferometry to expose the entire top metal layer surface for electrical fault isolation. It also describes a novel e-beam based probing technique called StaMPS which is used to isolate logic structure failures through SEM image contrasts. By landing SEM probe tips on exposed metal pads and controlling logic states via an applied bias, different levels of contrast are created highlighting structural failure locations. Die-level sample preparation combined with e-beam fault isolation optimizes turnaround time by delayering die in less than an hour and by locating several types of defects in a single sample.
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Issue Section:Sample Preparation and Device Deprocessing