SCM Application and Failure Analysis Procedure for Ion-Implantation Issues in Power Devices

This paper discusses the steps involved in the failure analysis of power semiconductor devices in which leakage currents are observed and can be traced to doping-profile variations in ion-implanted layers. The discovery and assessment of such defects takes knowledge and skill in sample preparation, fault isolation, and the use of advanced inspection techniques, particularly scanning capacitance microscopy, as explained in the paper. Several diodes, MOSFETs, and IGBTs were examined using the proposed approach and the results are presented along with SCM images showing incomplete and poorly shaped ion-implanted structures determined to be the root cause of failure in each case.