Abstract

Dissimilarities of thermal expansion coefficient between chip and package materials results in stress and strain at the solder interconnect leading to fatigue failures. Underfill is used between chip and package to reduce the interfacial stress and hence increase reliability. In this work, four flipchip package test vehicles underwent thermal cycling to accelerate the stress and were investigated systematically with different failure analysis techniques to study their failure modes. The prevalent failure mode was observed to be at the corner area between the chip and package using different advanced failure analysis techniques. This work demonstrates the technical complexity of analyzing stress induced defects and provides insight into CPI-based material selection.

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