Combinational logic analysis (CLA) using laser voltage probing allows studying standard cells such as NOR or NAND gates as a whole, instead of individual transistors. The process involves building a reference library of laser probing (LP) waveforms and comparing them to signals from the real device. While CLA has greatly increased the success rate and turn-around time for LP, there are difficulties in signal interpretation. This is partly due to the lack of precise understanding of the laser interaction area and probe placement and partly due to difficulties identifying the correct logic states in the waveform. In this work, we have significantly improved the CLA process by first predicting the shape of the waveform based on laser interaction with the target circuitry and second, implementing an automated pattern search algorithm to further increase the speed and reliability of CLA using LP.

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