Abstract
Different failure modes on a microcontroller-based SoC are presented. Several steps in the analysis needed to find the failure mechanism as well as prove "non-fails" amidst the maze of false positives and false trails, second-order effects, confusion and other challenges due to product complexity and the device's interaction with the embedded firmware (FW) are also discussed. The cases presented in this paper tackle issues that are related to FW, non-volatile memory (NVM), digital logic and analog modules.
This content is only available as a PDF.
Copyright © 2018 ASM International. All rights reserved.
2018
ASM International
Issue Section:
Failure Analysis Process
You do not currently have access to this content.