A novel approach for solid immersion lens (SIL) assisted imaging and backside analysis of chip-on-board devices is presented. The procedure relies on complete die extraction from its original package, and repackage into a FA-friendly Plastic Quad-Flat Package (PQFP) chip carrier with inverted mold configuration, which enables access to the backside of the die through grinding/polishing or other methods. This procedure also relies on complementing use of device-specific DUT boards with generic arrangement of I/O, ground and power domains, coupled with a bench-test board equipped with the same pin-out configuration and a custom carrier built specifically for these DUT boards. This generic approach broadens the use of this solution to an entire family of devices and offers a balance of test capability leading to fault localization success and cost control.

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