Abstract

As various types of DRAM package have been developed, new defects in interconnection in chip have been discovered after assembly process such as flip chip bump mount or wire bonding. There are lots of regular inspections in manufacturing process to detect assembly defects, but it is not easy to find all of the defects. We used a method to classify physical failures based on electrical measurements. Conventional open and short tests by using ISVM were used to support the mass production. External voltage sweep is employed to distinguish weak defects from strong defects of interconnection. Finally, a proposed method was verified with statistical analysis of 800,000 FBGA DRAM chips and physical analysis of failure chips.

This content is only available as a PDF.
You do not currently have access to this content.