Failure analysis and defect localization on 28nm All Programmable Zynq System-on-Chip (SoC) device is extremely challenging. While conventional FPGA, which only consists of the Programmable Logic, has greater ease and flexibility in pattern generation during fault isolation, the all programmable SoC device integrates a dual ARM Cortex-A9 cores with Programmable Logic (PL) in a single chip. The cache data access in-between processor and PL is more complex and test methodology has lesser degree of control on cache data flow and stack sequence. This paper introduced an advanced fault isolation test methodology combining Software Development Kit (SDK) with scan based diagnostic test for cache failures. It successfully pinpoint to failure locations with physical defects found. As conventional physical failure analysis approaches using SEM based passive voltage contrast could not observe any abnormalities, current imaging and nano-probing measurement using AFP played critical roles in detecting nano-ampere leakages prior subsequent TEM analysis. The findings were then feedback to the foundry for process improvement. Furthermore, a new screening methodology is innovated where an extreme low-voltage test at high temperature in Automatic Test to detect and eliminate the process marginal leakage failure.

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