Most modern system on-chip incorporates a significant amount of embedded memories to achieve a reduced power consumption, higher speed and lower cost. In general, such memories are evaluated using built-in self-testing methods and in the event of a failure, bitmapping is heavily relied on for fault localization to guide subsequent failure analysis. However, a fast yield ramp can be impeded when bitmapping is not enabled in time or is inaccurate. This work studies the feasibility of employing electrically-enhanced LADA as an alternative method to debug embedded memory failures. Results are presented to demonstrate that the resolution of localization depends on the precision of diagnostic test pattern used and the laser spot size.

This content is only available as a PDF.
You do not currently have access to this content.