Abstract

In many cases, the leakage is relatively small and tends to spread out over a relatively large area. While diagnostic techniques using laser stimulation, such as OBIRCH, or photoemission are powerful in identifying localized defects in silicon crystal and backend metal layers, they are found to be not as sensitive in isolating charge induced leakage. This paper presents a case study of dielectric charge induced leakage in a high voltage ESD device. In this case, conventional photoemission and laser probing diagnostic techniques were not able to localize leakage sites. By using atomic force probing for detailed electrical characterization of individual devices, experimenting with UV radiation, and SCM 2D dopant profiling analysis, it showed that trapped charges in dielectric layers cause leakage near silicon surface. Based on the finding, the FAB fixed the issue by implementing UV bake in the process.

This content is only available as a PDF.
You do not currently have access to this content.