Abstract
Accurate and lossless current sensing is vital for high performance multiphase buck converters used in the latest voltage regulation modules (VRMs). A synchronous FET onstate resistance based approach is an alternative topology to DCR based sensing and is compatible with any controller, which requires inductor current information. The MOSFET driver has built-in sense circuitry, which when co-packaged with the MOSFETs reduces total footprint and ease of design. The Powerstage embodiment virtually eliminates the parasitic inductance and resistance between Control and Synchronous power MOSFETS; and using thick copper clips substantially reduce the parasitics associated with the input supply voltage (VIN) and the switch node output voltage (VSW) connections when compared to wire-bonded solutions. This paper presents a novel investigation into a contradictory low on-resistance paradox in a stacked 3D configuration. Through analysis, characterization and simulation the author deciphered the conundrum leading to a root cause explained by a mismatch of internal gain and referenced on-resistance. Building on previous metrology improvements the innovative insights drove analysis toward root-cause.
