Abstract

The upward trend in memory to chip ratio in novel chip design had increase the possibility of a defect to fall on the memory area. There are a number of ways of performing memory address verification in the industry. This paper describes some of the methodologies as well as introduces an efficient approach using near infra-red (NIR) laser to perform the memory address verification. Current methodologies include analyzing physical chip with memory hard failure, the green laser (532nm) method, and the focus ion beam method. The advantages and disadvantages of each methodology are mentioned. As long as the failing orientation is correct and the test program failing address is within the NIR laser damage zone, a failure analyst can have more confidence to analyze a real chip with memory failure without any doubt that he/she might be looking at the wrong location.

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