Abstract
An anodic etching is used for silicon junction profile delineation. Experimental results show that the etching rate is determined by dopant type, of which P type silicon etching rate will be enhanced while the N type silicon become inactive when an external positive voltage is applied. The experiment verifies the role of holes on the silicon etching. The proposed method is applicable for exploring the profile of P+/N-well, N+/P-well, and N-well/P-well junctions, using the same recipe.
This content is only available as a PDF.
Copyright © 2013 ASM International. All rights reserved.
2013
ASM International
Issue Section:
Poster Session
You do not currently have access to this content.