Abstract

An anodic etching is used for silicon junction profile delineation. Experimental results show that the etching rate is determined by dopant type, of which P type silicon etching rate will be enhanced while the N type silicon become inactive when an external positive voltage is applied. The experiment verifies the role of holes on the silicon etching. The proposed method is applicable for exploring the profile of P+/N-well, N+/P-well, and N-well/P-well junctions, using the same recipe.

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