Advanced FIB CE Combined with Static Analysis for Functional Failure Analysis

It is difficult to simulate functional failures using static analysis tools, therefore, debugging and troubleshooting devices with functional failures present a special challenge for failure analysis (FA) work and often result in a root-cause success rate is quite low. In this paper, the application of advanced FIB circuit edit (CE) processes combined the static FA analysis yielded successful localization of a bipolar junction transistor (BJT) device soft failure. Additional FA techniques were incorporated within the FA flow, resulting in characterization of the electrical behavior of a suspected transistor and detection of an abnormal implant profile within the active area.