In semiconductor packaging, cracked die can result from any mechanical contact with the package during the manufacturing operation including final customer assembly. Depending on the extent of the damage to the device, even a subtle crack on the silicon die can diminish the operability, reliability or specifications of a semiconductor component. Historically, customer returns for cracked die have resulted in intense customer dissatisfaction and high penalties for semiconductor suppliers affecting both the automotive and commercial sectors. Over the years, attempts to model the effects of package impact have been unsuccessful due to the extreme complexity of internal package structures and die geometry. For example, “Probe Drop” studies have generated die cracks, but the technique does not accurately simulate the dynamic forces encountered in semiconductor manufacturing nor does it provide a measure of impact force. Other techniques such as Ball-on-Ring (BOR) and 3-Point-Bend testing are used for silicon strength evaluations. Additionally, a major misconception in the industry is that package damage is a good indicator of internal die damage. With the advent of a proper impacting device and use of a commercial load cell and high speed data converter, the concept of dynamic impact package characterization has conclusively proven to be a reliable technique to accurately measure the actual dynamic impact forces imposed to a packaged semiconductor device during manufacturing and customer assembly. The resulting characterization allows for better understanding of the package susceptibility towards failure as devices shrink in size or when assembly materials or techniques change.

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