With advancements in technology, it is nearly impossible to find the defects in integrated circuits without applying appropriate failure isolation techniques. Failure isolation is a critical step in identifying the physical defect on integrated circuits. This paper addresses the challenges imposed by floating node conditions on both analog and digital circuitry, and a case study for each circuit type is presented. Different approaches along with the challenges involved in isolating each case in a very timely manner are addressed. Finally, the usefulness of global isolation tools, such as PEM (Photon Emission Microscopy), FIB (Focused Ion Beam), and micro-probing, is also discussed.

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