Substrate modifications on the Integrated Circuit (IC) package provide opportunities for the Failure Analyst (FA) to troubleshoot a routing failure or allow a design engineer to create new routing possibilities for a prototype device. The results can mean the difference in finding the root cause of the problem and being early or late to market. This paper describes a variety of methods to open sections of the package circuit board to access and cut I/O traces interwoven throughout the package substrate. It also describes the use of conductive epoxies for connecting traces, vias and solders bumps. Restoring the solder mask with an ultraviolet (UV) light curing conformal coating is also discussed. This method was used to characterize ground sensitivities and simulate inductance effects on the package. The flexibility and fast turnaround time this method enables has already enhanced product performance.