Abstract
For most advanced semiconductor products, Focused Ion Beam (FIB) circuit modification and node access through the backside of the chip is the only viable approach. The high density of interconnect wiring and the presence of C4 solder bumping for chip to module attachment has made complex edits virtually impossible with long standing conventional frontside techniques. Unfortunately, the presence of buried circuit elements on the very latest designs greatly complicates the backside editing formula. The introduction of deep trench capacitors as a distributed circuit element in logic designs has had a profound impact on the established methods of backside FIB chip editing. In many cases wide area preparatory trenching down to the underside of circuitry cannot be done without damage to structures that penetrate the silicon adjacent to active transistors by as much as 10 microns. The decision whether to remove these devices or attempt to work around them requires an analysis of the impact on circuit performance and an assessment of the working space (control of anisotropy of etch, aspect ratio issues, etc.) available for executing the edit. IBM is in the process of developing a new set of procedures for performing FIB backside edits on circuits that incorporate these buried structures.