Abstract

Integrated circuit complexity and density are continuously increasing with the rapid progress of advanced technology nodes. The density of wafer acceptance test (WAT) pattern is also becoming higher as the device continuing to shrink. Failure analysis (FA) techniques have been developed to improve the precision of defect isolation. A technique with more precise fault isolation capability is needed when the test pattern density increased. In this paper we have isolated faults within a dense high Rc array by using conductive atomic force microscopy (C-AFM). The fault sites in the array can be located efficiently with nano-scale precision. Point contact I-V measurements provide a quantitative comparison of the fault sites.

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