Abstract

The authors present a detailed analysis of a full-thickness backside trenching and contact level circuit editing methodology used to achieve a success yield of greater than 90%. The methodology involves both full-thickness backside trenching and contact level circuit modifications on flip-chip parts produced with 90nm, 65nm, and 40nm foundry processes and mounted on laminated package technology. Having successfully edited >150 parts with this methodology, the authors prove that full-thickness trenching is a viable alternative to a traditional die-thinning process, and that circuit edits at the contact layer, to avoid milling into the copper metal layers, greatly reduces risk and uncertainty.

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