Abstract

The technique of Nanoprobe Capacitance-Voltage Spectroscopy (NCVS) at contact level (CA) for identfication of FEOL defects in MOSFET devices, especially for silicon on insulator applications has been extensively detailed [1]. The introduction of Nanoprobe Capacitance Voltage Spectroscopy (NCVS) of discrete MOSFET and SOI embedded dynamic ramdon access memory devices (eDRAM) without the time consuming delayering methods of conventional scanning capacitance microscopy have also been highlighted [2]. This paper is intended to describe the advantages of NCVS to localize defects in specific MOSFET devices at CA level as well as to identify resistive BEOL via interconnections and FEOL defective high k metal gate structures without the attendant time consuming delayering steps employed with classical SCM methods. Localization of a FEOL defect in a discrete 32nm SOI MOSFET device in SRAM array causing a vertical pair cell failure signature will be discussed.

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