For more than 10 years, silicon thinning techniques have been relegated to an art form of mere necessity to enable complex optical probing and circuit edit analysis. Silicon thinning is a fundamental aspect of diagnostic analysis and while it is well-understood that limitations in the area of silicon thinning can severely limit high-quality diagnostic results, poor thinning results have generally been accepted as standard environmental operating conditions with which optical probe and circuit edit engineers must cope. Presented here is a scientific approach to thinning silicon to enable predictable high-precision, high-quality results. Remaining silicon thickness (RST) has been debated throughout the years because it was uncertain how much thinning was excessive. Primary perceived limitations included mechanical constraints (package / die warping) and post-thinning thermal control. Adding to the complexity of the discussion has been the fact that RST has been largely uncertain because analysis usually involved determining how much silicon was removed rather than how much silicon remains. All of these challenges have been overcome. A novel process has been developed to ultra-thin bulk Si to as low as 10um remaining Si thickness, eliminating the need for the Laser Chemical Etcher for circuit edit and improving optical emission probing considerably. This sample preparation process has been used on Intel Core2 Duo products with a success rate of 98%. Post FIB unit testing is a critical step in this debug process. A technique was developed to calibrate the change in thermal resistivity of the ultra-thin unit such that it will remain within 100ps of its original FMax performance in 90% of tests.

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