A new approach to reliability improvement and failure analysis on ICs is introduced, involving a specifically developed tool for Topography and Deformation Measurement (TDM) under thermal stress conditions. Applications are presented including delamination risk or bad solderability assessment on BGAs during JEDEC type reflow cycles.

ball grid arrays, deformation measurement, delamination, failure analysis, IC packages, solderability, thermal stress, topography measurement
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Copyright © 2009 ASM International. All rights reserved.
2009
ASM International
Topics
Electronic packaging Semiconductor wafer fabrication
Issue Section:
IPFA 09 Best Paper
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