This paper presents the characterization and analysis of Static Random Access Memory (SRAM) standby leakage by electrical characterization, leakage localization, and atomic force probe (AFP) discrete device probing. The methodology described in the paper was applied on 45 nanometers bulk technology parametric SRAM leakage macros, where it indicated the leakage mechanism was junction leakage in the pullup p-type field effect transistors (PFETs) which resulted in raising the gate voltage on the cross coupled pulldown n-type FETs. Backside Optical Beam Induced Resistance Change using a solid immersion lens was performed to identify the high leakage SRAM cells and nanoprobing with an AFP was used to obtain transistor data, which supported the original leakage mechanism. A SEM cross section was obtained which showed a CArec SRAM cell node contact extending deep into the STI along the side of the PFET active area was the physical cause of the high SRAM standby leakage.

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